Yalçin Balcioglu

According to our database1, Yalçin Balcioglu authored at least 6 papers between 2008 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2017
A standard cell phase locked loop design, analysis and high-level synthesis tool (CellPLL).
Integr., 2017

A 0.65-1.35 GHz synthesizable all-digital phase locked loop with quantization noise suppressing time-to-digital converter.
Turkish J. Electr. Eng. Comput. Sci., 2017

2015
Improved standard cell synthesizable Digitally Controlled Oscillator.
Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015

A synthesizable Time to Digital Converter (TDC) with MIMO spatial oversampling method.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

2009
A multiple intersection integrated wireless and vehicular network simulator.
Proceedings of the IEEE Vehicular Networking Conference, 2009

2008
An Integrated Wireless Intersection Simulator for collision warning systems in vehicular networks.
Proceedings of the IEEE International Conference on Vehicular Electronics and Safety, 2008


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