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Yanan Cao

Affiliations:
  • Iowa State University, Department of Electrical and Computer Engineering, Ames, IA, USA
  • College of William and Mary, Williamsburg, VA, USA (PhD 2002)


According to our database1, Yanan Cao authored at least 6 papers between 2013 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
Flexible memory: A novel main memory architecture with block-level memory compression.
[BibTeX]
[DOI]
Yanan Cao
,
Long Chen
,
Zhao Zhang
Proceedings of the 10th IEEE International Conference on Networking, 2015

Memory design for selective error protection.
[BibTeX]
[DOI]
Yanan Cao
,
Long Chen
,
Zhao Zhang
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

2014
MASTER: A Multicore Cache Energy-Saving Technique Using Dynamic Cache Reconfiguration.
[BibTeX]
[DOI]
Sparsh Mittal
,
Yanan Cao
,
Zhao Zhang
IEEE Trans. Very Large Scale Integr. Syst., 2014

2013
E<sup>3</sup>CC: A memory error protection scheme with novel address mapping for subranked and low-power memories.
[BibTeX]
[DOI]
Long Chen
,
Yanan Cao
,
Zhao Zhang
ACM Trans. Archit. Code Optim., 2013

CASHIER: A Cache Energy Saving Technique for QoS Systems.
[BibTeX]
[DOI]
Sparsh Mittal
,
Zhao Zhang
,
Yanan Cao
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

Free ECC: An efficient error protection for compressed last-level caches.
[BibTeX]
[DOI]
Long Chen
,
Yanan Cao
,
Zhao Zhang
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013


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