Yanan Cao

According to our database, Yanan Cao authored at least 7 papers between 2013 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

Introducing memory versatility to enhance memory system performance, energy efficiency and reliability.

Yanan Cao

PhD thesis, 2016

2015

Flexible memory: A novel main memory architecture with block-level memory compression.

Yanan Cao, Long Chen, Zhao Zhang

Proceedings of the 10th IEEE International Conference on Networking, 2015

Memory design for selective error protection.

Yanan Cao, Long Chen, Zhao Zhang

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

2014

MASTER: A Multicore Cache Energy-Saving Technique Using Dynamic Cache Reconfiguration.

Sparsh Mittal, Yanan Cao, Zhao Zhang

IEEE Trans. Very Large Scale Integr. Syst., 2014

2013

E³CC: A memory error protection scheme with novel address mapping for subranked and low-power memories.

Long Chen, Yanan Cao, Zhao Zhang

ACM Trans. Archit. Code Optim., 2013

CASHIER: A Cache Energy Saving Technique for QoS Systems.

Sparsh Mittal, Zhao Zhang, Yanan Cao

Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

Free ECC: An efficient error protection for compressed last-level caches.

Long Chen, Yanan Cao, Zhao Zhang

Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013