Yanjiang Liu

Orcid: 0000-0003-1806-6748

According to our database1, Yanjiang Liu authored at least 23 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2024
RGMU: A High-flexibility and Low-cost Reconfigurable Galois Field Multiplication Unit Design Approach for CGRCA.
ACM Trans. Design Autom. Electr. Syst., March, 2024

Mitigating Large Language Model Hallucinations via Autonomous Knowledge Graph-Based Retrofitting.
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024

2023
Towards a metrics suite for evaluating cache side-channel vulnerability: Case studies on an open-source RISC-V processor.
Comput. Secur., December, 2023

A High-performance Masking Design Approach for Saber against High-order Side-channel Attack.
ACM Trans. Design Autom. Electr. Syst., November, 2023

CBDC-PUF: A Novel Physical Unclonable Function Design Framework Utilizing Configurable Butterfly Delay Chain Against Modeling Attack.
ACM Trans. Design Autom. Electr. Syst., September, 2023

MA-GRNN:a high-efficient modeling attack approach utilizing generalized regression neural network for XOR arbiter physical unclonable functions.
IEICE Electron. Express, 2023

Understanding Differential Search Index for Text Retrieval.
Proceedings of the Findings of the Association for Computational Linguistics: ACL 2023, 2023

2022
A Low-Overhead and High-Security Cryptographic Circuit Design Utilizing the TIGFET-Based Three-Phase Single-Rail Pulse Register against Side-Channel Attacks.
ACM Trans. Design Autom. Electr. Syst., 2022

A Comprehensive Evaluation of Integrated Circuits Side-Channel Resilience Utilizing Three-Independent-Gate Silicon Nanowire Field Effect Transistors-Based Current Mode Logic.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Performance Model for Reconfigurable Block Cipher Array Utilizing Amdahl's Law.
IEICE Trans. Inf. Syst., 2022

A Cost-Sensitive Golden Chip-Free Hardware Trojan Detection Using Principal Component Analysis and Naïve Bayes Classification Algorithm.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022

2021
Test Generation for Hardware Trojan Detection Using Correlation Analysis and Genetic Algorithm.
ACM Trans. Embed. Comput. Syst., 2021

Golden Chip-Free Trojan Detection Leveraging Trojan Trigger's Side-Channel Fingerprinting.
ACM Trans. Embed. Comput. Syst., 2021

Security-Driven Placement and Routing Tools for Electromagnetic Side-Channel Protection.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

On-Chip Trust Evaluation Utilizing TDC-Based Parameter-Adjustable Security Primitive.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

A high-efficient and low-cost secure AMBA framework utilizing configurable data encryption modeling against probe attacks.
IEICE Electron. Express, 2021

A novel SCA-resilience flip-flop design utilizing the current mode logic based on the three-independent-gate field effect transistors.
IEICE Electron. Express, 2021

2020
A Statistical Test Generation Based on Mutation Analysis for Improving the Hardware Trojan Detection.
J. Circuits Syst. Comput., 2020

Golden chip free Trojan detection leveraging probabilistic neural network with genetic algorithm applied in the training phase.
Sci. China Inf. Sci., 2020

Runtime Trust Evaluation and Hardware Trojan Detection Using On-Chip EM Sensors.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Golden chip free Trojan detection leveraging electromagnetic side channel fingerprinting.
IEICE Electron. Express, 2019

Hardware Trojan Detection Leveraging a Novel Golden Layout Model Towards Practical Applications.
J. Electron. Test., 2019

CAD4EM-P: Security-Driven Placement Tools for Electromagnetic Side Channel Protection.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2019


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