Yanjin Lyu

Orcid: 0000-0002-2598-3168

According to our database1, Yanjin Lyu authored at least 8 papers between 2022 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 7 mHz-6.29 Hz Configurable High-Pass Analog Front-End With Direct Tunneling Biasing and Output DC-Servo Loop.
IEEE Trans. Biomed. Circuits Syst., June, 2026

An Adaptive SMU System with Single-Shot Transient Impedance Sensing and 1 mF Capacitive Driveability.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025
A 2.30 NEF Split-Steering Amplifier for Switched-Capacitor Circuits With -14.2-dB CM-CM Gain and 100-V/μs Slew Rate.
IEEE J. Solid State Circuits, February, 2025

2023
A Matching Strategy Based on Full-Permutation Bisection for Data Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023

A 61 mHz - 3.4 Hz High-pass Capacitively Coupled Analog Frontend with Tunnelling Biasing and Output DC Servo Loop.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A Universal Evaluation Method of Element Matching Strategies for Data Converters Based on Optimal Combination Algorithms.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A Mismatch Compensation Scheme for Cyclic-pipelined ADC via Dynamic Element Matching Technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A 16-Bit 2 MS/s Cyclic-pipelined ADC with Calibration for Inter-stage Amplification.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022


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