Yannan Nellie Wu

Orcid: 0009-0001-0933-4600

According to our database1, Yannan Nellie Wu authored at least 8 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

LoopTree: Enabling Exploration of Fused-layer Dataflow Accelerators.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023

2022
Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

2021
Sparseloop: An Analytical, Energy-Focused Design Space Exploration Methodology for Sparse Tensor Accelerators.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Architecture-Level Energy Estimation for Heterogeneous Computing Systems.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

2020
An Architecture-Level Energy and Area Estimator for Processing-In-Memory Accelerator Designs.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020

2019
Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs.
Proceedings of the International Conference on Computer-Aided Design, 2019


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