Po-An Tsai

According to our database, Po-An Tsai authored at least 26 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Abstracting Sparse DNN Acceleration via Structured Sparse Tensor Decomposition.

Geonhwa Jeong, Po-An Tsai, Abhimanyu Rajeshkumar Bambhaniya, Stephen W. Keckler, Tushar Krishna

CoRR, 2024

2023

Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical Heterogeneous Processing.

Michael Pellauer, Jason Clemons, Vignesh Balaji, Neal Clayton Crago, Aamer Jaleel, Donghyuk Lee, Mike O'Connor, Anghsuman Parashar, Sean Treichler, Po-An Tsai, Stephen W. Keckler, Joel S. Emer

ACM Trans. Comput. Syst., 2023

HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity.

Yannan Nellie Wu, Po-An Tsai, Saurav Muralidharan, Angshuman Parashar, Vivienne Sze, Joel S. Emer

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

RM-STC: Row-Merge Dataflow Inspired GPU Sparse Tensor Core for Energy-Efficient Sparse Acceleration.

Guyue Huang, Zhengyang Wang, Po-An Tsai, Chen Zhang, Yufei Ding, Yuan Xie

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling (Extended Abstract).

Toluwanimi O. Odemuyiwa, Hadi Asghari Moghaddam, Michael Pellauer, Kartik Hegde, Po-An Tsai, Neal Clayton Crago, Aamer Jaleel, John D. Owens, Edgar Solomonik, Joel S. Emer, Christopher W. Fletcher

Proceedings of the 2023 ACM Workshop on Highlights of Parallel Computing, 2023

Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling.

Toluwanimi O. Odemuyiwa, Hadi Asghari Moghaddam, Michael Pellauer, Kartik Hegde, Po-An Tsai, Neal Clayton Crago, Aamer Jaleel, John D. Owens, Edgar Solomonik, Joel S. Emer, Christopher W. Fletcher

Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022

Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling.

Yannan Nellie Wu, Po-An Tsai, Angshuman Parashar, Vivienne Sze, Joel S. Emer

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

Ruby: Improving Hardware Efficiency for Tensor Algebra Accelerators Through Imperfect Factorization.

Mark Horeni, Pooria Taheri, Po-An Tsai, Angshuman Parashar, Joel S. Emer, Siddharth Joshi

Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

SIMD²: a generalized matrix instruction set for accelerating tensor computation beyond GEMM.

Yunan Zhang, Po-An Tsai, Hung-Wei Tseng

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

Demystifying Map Space Exploration for NPUs.

Sheng-Chun Kao, Angshuman Parashar, Po-An Tsai, Tushar Krishna

Proceedings of the IEEE International Symposium on Workload Characterization, 2022

2021

Leaking Secrets Through Compressed Caches.

Po-An Tsai, Andrés Sánchez, Christopher W. Fletcher, Daniel Sánchez

IEEE Micro, 2021

Sparseloop: An Analytical, Energy-Focused Design Space Exploration Methodology for Sparse Tensor Accelerators.

Yannan Nellie Wu, Po-An Tsai, Angshuman Parashar, Vivienne Sze, Joel S. Emer

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Mind mappings: enabling efficient algorithm-accelerator mapping space search.

Kartik Hegde, Po-An Tsai, Sitao Huang, Vikas Chandra, Angshuman Parashar, Christopher W. Fletcher

Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators.

Geonhwa Jeong, Gokcen Kestor, Prasanth Chatarasi, Angshuman Parashar, Po-An Tsai, Sivasankaran Rajamanickam, Roberto Gioiosa, Tushar Krishna

Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021

2020

Safecracker: Leaking Secrets through Compressed Caches.

Po-An Tsai, Andrés Sánchez, Christopher W. Fletcher, Daniel Sánchez

Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020

2019

Compress Objects, Not Cache Lines: An Object-Based Compressed Memory Hierarchy.

Po-An Tsai, Daniel Sánchez

Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2018

Rethinking the Memory Hierarchy for Modern Languages.

Po-An Tsai, Yee Ling Gan, Daniel Sánchez

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Adaptive Scheduling for Systems with Asymmetric Memory Hierarchies.

Po-An Tsai, Changping Chen, Daniel Sánchez

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

KPart: A Hybrid Cache Partitioning-Sharing Technique for Commodity Multicores.

Nosayba El-Sayed, Anurag Mukkara, Po-An Tsai, Harshad Kasture, Xiaosong Ma, Daniel Sánchez

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017

Jenga: Software-Defined Cache Hierarchies.

Po-An Tsai, Nathan Beckmann, Daniel Sánchez

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

Nexus: A New Approach to Replication in Distributed Shared Caches.

Po-An Tsai, Nathan Beckmann, Daniel Sánchez

Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016

Uncertainty and Mental Workload Among Wayfinding Strategies.

Yi Chia Chien, Po-An Tsai, Yu Ting Lin, Ssu Min Wu, Kuan Ting Chen, Yu Ting Han, Philip Hwang

Proceedings of the Universal Access in Human-Computer Interaction. Users and Context Diversity, 2016

2015

Feature space optimization of multispectral imagery and LiDAR waveform data.

Yu-Ching Lin, Po-An Tsai, Chun-Lin Lin, Kuan-Tsung Chang, Ming-Da Tsai

Proceedings of the 2015 IEEE International Geoscience and Remote Sensing Symposium, 2015

Scaling distributed cache hierarchies through computation and data co-scheduling.

Nathan Beckmann, Po-An Tsai, Daniel Sánchez

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

2013

Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems.

Po-An Tsai, Yu-Hsin Kuo, En-Jui Chang, Hsien-Kai Hsin, An-Yeu Wu

Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

2012

Path-Diversity-Aware Adaptive Routing in Network-on-Chip Systems.

Yu-Hsin Kuo, Po-An Tsai, Hao-Ping Ho, En-Jui Chang, Hsien-Kai Hsin, An-Yeu Andy Wu

Proceedings of the IEEE 6th International Symposium on Embedded Multicore/Manycore SoCs, 2012