Yao-Sheng Hu

According to our database1, Yao-Sheng Hu authored at least 9 papers between 2014 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
A 0.6 V 1.63 fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System.
IEEE J. Solid State Circuits, 2019

2018
An 89.55dB-SFDR 179.6dB-FoMs 12-bit lMS/s SAR-Assisted SAR ADC with Weight-Split Compensation Calibration.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

A 0.6V 1.63fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2016
A 12.5-fJ/Conversion-Step 8-Bit 800-MS/s Two-Step SAR ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

An 8-bit 900MS/S two-step SAR ADC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A 12-bit 200kS/s subranging SAR ADC with an energy-curve reshape technique.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

A 0.9V 15fJ/conversion-step 8-bit 1.5GS/s two-step SAR ADC.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2014
11.2 A 0.85fJ/conversion-step 10b 200kS/s subranging SAR ADC in 40nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A 0.6V 6.4fJ/conversion-step 10-bit 150MS/s subranging SAR ADC in 40nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014


  Loading...