Yassine Aoudni

Orcid: 0000-0002-6851-9488

According to our database1, Yassine Aoudni authored at least 13 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2023
Blockchain aware proxy re-encryption algorithm-based data sharing scheme.
Phys. Commun., June, 2023

2022
Cloud security based attack detection using transductive learning integrated with Hidden Markov Model.
Pattern Recognit. Lett., 2022

2017
OpenMP-Based Approach for High Level C Loops Synthesis.
Int. J. Softw. Innov., 2017

2016
Java-based approach for high level OpenMP loops synthesis.
Proceedings of the 14th IEEE International Conference on Software Engineering Research, 2016

2015
Automatic C code manipulation and transformation to rapid embedded systems design.
Proceedings of the 16th IEEE/ACIS International Conference on Software Engineering, 2015

2014
The implementation of basic morphological operations on FPGA using partial reconfiguration.
Proceedings of the International Image Processing, 2014

2013
Object-oriented approach to Rapid Custom Instruction design
CoRR, 2013

2012
An efficient Resource Management to optimize the placement of hardware task on FPGA in the RVC framework.
Des. Autom. Embed. Syst., 2012

Mppsocgen: A framework for automatic generation of mppsoc architecture
CoRR, 2012

Measuring the Quality of IRIS Segmentation for Improved IRIS Recognition Performance.
Proceedings of the Eighth International Conference on Signal Image Technology and Internet Based Systems, 2012

Automatic generation of Coprocessor program from VHDL description.
Proceedings of the 1st Mediterranean Conference on Embedded Computing, 2012

A hierarchical implementation of Hadamard transform using RVC-CAL dataflow programming and dynamic partial reconfiguration.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011
FPGA dynamic reconfiguration using the RVC technology: Inverse quantization case study.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011


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