Yassine Aydi

According to our database, Yassine Aydi authored at least 6 papers between 2008 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Implementing On-Chip Wireless Communication in Multi-stage Interconnection NoCs.

Sirine Mnejja, Yassine Aydi, Mohamed Abid, Salvatore Monteleone, Maurizio Palesi, Davide Patti

Proceedings of the Advanced Information Networking and Applications, 2020

2018

Exploring Hybrid NoC Architecture for Chip Multiprocessor.

Sirine Mnejja, Yassine Aydi, Mohamed Abid

Proceedings of the 30th International Conference on Microelectronics, 2018

2011

A multi-level design methodology of multistage interconnection network for MPSOCs.

Yassine Aydi, Mouna Baklouti, Mohamed Abid, Jean-Luc Dekeyser

Int. J. Comput. Appl. Technol., 2011

2010

Scalable mpNoC for massively parallel systems - Design and implementation on FPGA.

Mouna Baklouti, Yassine Aydi, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid

J. Syst. Archit., 2010

2009

A multi level functional verification of multistage interconnection network for MPSOC.

Yassine Aydi, Ramzi Tligue, Maissa Elleuch, Mohamed Abid, Jean-Luc Dekeyser

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

Formal Specification of Delta MINs for MPSOC in the ACL2 Logic.

Maissa Elleuch, Yassine Aydi, Mohamed Abid

Proceedings of the Forum on specification and Design Languages, 2008