Yesong Jeong

According to our database1, Yesong Jeong authored at least 2 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A Fully Digital and Bias-Free Ternary Bus for Energy-Efficient On-Chip Interconnects.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2024
A 28-nm 323 TOPS/mm<sup>2</sup>/b and 2007 TOPS/W/b Ternary Latch Based Sparsity-Aware CIM Macro With Double-Sampling Ternary ADC.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024


  Loading...