Hoichang Jeong

Orcid: 0000-0002-2391-1814

According to our database1, Hoichang Jeong authored at least 5 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2023
A Ternary Neural Network Computing-in-Memory Processor With 16T1C Bitcell Architecture.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2023

A 701.7 TOPS/W Time-Domain Spiking Neural Network Compute-in-Memory Processor with 9T1C Bitcell.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022
An Energy-Efficient CNN Accelerator for Multi-object Real-Time Semantic Segmentation in Autonomous Vehicle.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A Real-Time Sparsity-Aware 3D-CNN Processor for Mobile Hand Gesture Recognition.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2020
A 10-MHz Current-mode Constant On-time Boost Converter with a Translinear Loop-based Current Sensor.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020


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