Hoichang Jeong
Orcid: 0000-0002-2391-1814
According to our database1,
Hoichang Jeong authored at least 16 papers
between 2020 and 2026.
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Bibliography
2026
HYTEC: Compact and Energy-Efficient Analog-Digital Hybrid CIM With Transpose Ternary eDRAM.
IEEE J. Solid State Circuits, June, 2026
DPIM: A 2T1C eDRAM Transformer-in-Memory Chip With Sparsity-Aware Quantization and Heterogeneous Dense-Sparse Core.
IEEE J. Solid State Circuits, May, 2026
A Multibit ReRAM Computing-in-Memory Processor With Adaptive Decision Level Nonlinear ADC for Ultra-Low-Energy Keyword Spotting in Mobile Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2026
CINELL: An Energy-Efficient Compute-In/Near-Memory eDRAM Processor for Sparse Transformer-Based Large Language Models.
IEEE Trans. Very Large Scale Integr. Syst., January, 2026
2025
C<sup>2</sup>IM-NN: A Low-Power 3D Point Clouds Matching Processor With 1D-CNN Prediction and CAM-Based In-Memory k-NN Searching.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2025
A 701.7 TOPS/W Compute-in-Memory Processor With Time-Domain Computing for Spiking Neural Network.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2025
A 0.74 μJ/decision and 22.59 TOPS/W Keyword Spotting CIM Processor with Short-Current-Free Multi-level ReRAM and Adaptive-Decision-Level Nonlinear ADC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
A 46 TOPS/W In-/Near-Memory Computing Processor for Large Language Model with Extended Sparse Attention.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
A 28-nm 323 TOPS/mm<sup>2</sup>/b and 2007 TOPS/W/b Ternary Latch Based Sparsity-Aware CIM Macro With Double-Sampling Ternary ADC.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024
A 273.48 TOPS/W and 1.58 Mb/mm<sup>2</sup> Analog-Digital Hybrid CIM Processor with Transpose Ternary-eDRAM Bitcell.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024
A Low-power 3D Point Clouds Matching Processor with 1D-CNN Prediction and CAM-based In-memory kNN Searching.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2023
A Ternary Neural Network Computing-in-Memory Processor With 16T1C Bitcell Architecture.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2023
A 701.7 TOPS/W Time-Domain Spiking Neural Network Compute-in-Memory Processor with 9T1C Bitcell.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
2022
An Energy-Efficient CNN Accelerator for Multi-object Real-Time Semantic Segmentation in Autonomous Vehicle.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2020
A 10-MHz Current-mode Constant On-time Boost Converter with a Translinear Loop-based Current Sensor.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020