Yi-Hua Edward Yang

According to our database1, Yi-Hua Edward Yang authored at least 26 papers between 2008 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2018
Throughput-Optimized Frequency Domain CNN with Fixed-Point Quantization on FPGA.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

2016
FPGA-Based Acceleration of Pattern Matching in YARA.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2014
Energy-efficient histogram on FPGA.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Energy-efficient histogram equalization on FPGA.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

2013
Robust and Scalable String Pattern Matching for Deep Packet Inspection on Multicore Processors.
IEEE Trans. Parallel Distributed Syst., 2013

Architecture and performance models for scalable IP lookup engines on FPGA.
Proceedings of the IEEE 14th International Conference on High Performance Switching and Routing, 2013

2012
Large-Scale Regular Expression Matching on FPGA.
Proceedings of the Handbook of Finite State Based Models and Applications., 2012

High-Performance and Compact Architecture for Regular Expression Matching on FPGA.
IEEE Trans. Computers, 2012

A memory efficient IPv6 lookup engine on FPGA.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Large-scale multi-flow regular expression matching on FPGA.
Proceedings of the 13th IEEE International Conference on High Performance Switching and Routing, 2012

Scalable architecture for 135 GBPS IPv6 lookup on FPGA (abstract only).
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011
Multi-stream Regular Expression Matching on FPGA.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Space-time tradeoff in regular expression matching with semi-deterministic finite automata.
Proceedings of the INFOCOM 2011. 30th IEEE International Conference on Computer Communications, 2011

High Performance IP Lookup on FPGA with Combined Length-Infix Pipelined Search.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Optimizing Regular Expression Matching with SR-NFA on Multi-Core Systems.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010
Head-body partitioned string matching for Deep Packet Inspection with scalable and attack-resilient performance.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Scalable multi-pipeline architecture for high performance multi-pattern string matching.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

High Performance Dictionary-Based String Matching for Deep Packet Inspection.
Proceedings of the INFOCOM 2010. 29th IEEE International Conference on Computer Communications, 2010

Automation Framework for Large-Scale Regular Expression Matching on FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

High throughput and large capacity pipelined dynamic search tree on FPGA.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

Memory efficient string matching: a modular approach on FPGAs (abstract only).
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009
Software Toolchain for Large-Scale RE-NFA Construction on FPGA.
Int. J. Reconfigurable Comput., 2009

Memory-Efficient Pipelined Architecture for Large-Scale String Matching.
Proceedings of the FCCM 2009, 2009

2008
Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Protocol Family for Optimal and Deterministic Symmetric Key Assignment.
Proceedings of the Seventh International Conference on Networking (ICN 2008), 2008

Compact architecture for high-throughput regular expression matching on FPGA.
Proceedings of the 2008 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2008


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