Weirong Jiang

According to our database1, Weirong Jiang authored at least 47 papers between 2005 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2015
Network Virtualization in Data Centers: A Data Plane Perspective.
Proceedings of the Handbook on Data Centers, 2015

2014
A Scalable and Modular Architecture for High-Performance Packet Classification.
IEEE Trans. Parallel Distrib. Syst., 2014

Practical Multituple Packet Classification Using Dynamic Discrete Bit Selection.
IEEE Trans. Computers, 2014

High-Speed Packet Processing using Reconfigurable Computing.
IEEE Micro, 2014

A programmable and scalable openflow switch using heterogeneous soc platforms.
Proceedings of the third workshop on Hot topics in software defined networking, 2014

A flexible and scalable high-performance OpenFlow switch on heterogeneous SoC platforms.
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014

2013
Data Structure Optimization for Power- Efficient IP Lookup Architectures.
IEEE Trans. Computers, 2013

Scalable Ternary Content Addressable Memory implementation using FPGAs.
Proceedings of the Symposium on Architecture for Networking and Communications Systems, 2013

2012
Scalable Packet Classification on FPGA.
IEEE Trans. VLSI Syst., 2012

ParaSplit: A Scalable Architecture on FPGA for Terabit Packet Classification.
Proceedings of the IEEE 20th Annual Symposium on High-Performance Interconnects, 2012

2011
A Framework for Security-Enhanced Peer-to-Peer Applications in Mobile Cellular Networks.
IJCNS, 2011

Bidirectional Pipelining for Scalable IP Lookup and Packet Classification
CoRR, 2011

An Improved Information Feedback Strategy for Symmetrical Two-Route Traffic Flow Model.
Proceedings of the 13th UKSim-AMSS International Conference on Computer Modelling and Simulation, Cambridge University, Emmanuel College, Cambridge, UK, 30 March, 2011

FEACAN: Front-end acceleration for content-aware network processing.
Proceedings of the INFOCOM 2011. 30th IEEE International Conference on Computer Communications, 2011

Multiroot: Towards Memory-Efficient Router Virtualization.
Proceedings of IEEE International Conference on Communications, 2011

Memory-Efficient IPv4/v6 Lookup on FPGAs Using Distance-Bounded Path Compression.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2010
Scalable multi-pipeline architecture for high performance multi-pattern string matching.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

FRuG: A benchmark for packet forwarding in future networks.
Proceedings of the 29th International Performance Computing and Communications Conference, 2010

Architecture-aware data structure optimization for green IP lookup.
Proceedings of the 11th IEEE International Conference on High Performance Switching and Routing, 2010

Power-Aware Parallel Forwarding: An Optimization Study.
Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications, 2010

A message-passing multi-softcore architecture on FPGA for Breadth-first Search.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Multi-dimensional packet classification on FPGA: 100 Gbps and beyond.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Real-Time Classification of Multimedia Traffic Using FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
Sequence-preserving parallel IP lookup using multiple SRAM-based pipelines.
J. Parallel Distrib. Comput., 2009

Field-split parallel architecture for high performance multi-match packet classification using FPGAs.
Proceedings of the SPAA 2009: Proceedings of the 21st Annual ACM Symposium on Parallelism in Algorithms and Architectures, 2009

A Cross-Layer AOMDV Routing Protocol for V2V Communication in Urban VANET.
Proceedings of the MSN 2009, 2009

Reducing dynamic power dissipation in pipelined forwarding engines.
Proceedings of the 27th International Conference on Computer Design, 2009

Scalable Packet Classification: Cutting or Merging?
Proceedings of the 18th International Conference on Computer Communications and Networks, 2009

Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification.
Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

Large-scale wire-speed packet classification on FPGAs.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

Load-aware bidirectional pipeline construction for terabit IP forwarding.
Proceedings of the 43rd Annual Conference on Information Sciences and Systems, 2009

A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification.
Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009

2008
Parallel IP lookup using multiple SRAM-based pipelines.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Towards Green Routers: Depth-Bounded Multi-Pipeline Architecture for Power-Efficient IP Lookup.
Proceedings of the 2008 IEEE International Performance, 2008

Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup.
Proceedings of the INFOCOM 2008. 27th IEEE International Conference on Computer Communications, 2008

Multi-Way Pipelining for Power-Efficient IP Lookup.
Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008

Scalable high-throughput SRAM-based architecture for IP-lookup using FPGA.
Proceedings of the FPL 2008, 2008

A SRAM-based Architecture for Trie-based IP Lookup Using FPGA.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

Multi-terabit ip lookup using parallel bidirectional pipelines.
Proceedings of the 5th Conference on Computing Frontiers, 2008

Compact architecture for high-throughput regular expression matching on FPGA.
Proceedings of the 2008 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2008

2007
High Throughput Routing in Large-Scale Multi-Radio Wireless Mesh Networks.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2007

Routing Overhead Minimization in Large-Scale Wireless Mesh Networks.
Proceedings of the 65th IEEE Vehicular Technology Conference, 2007

A Trust Model Based Cooperation Enforcement Mechanism in Mesh Networks.
Proceedings of the Sixth International Conference on Networking (ICN 2007), 2007

A Memory-Balanced Linear Pipeline Architecture for Trie-based IP Lookup.
Proceedings of the 15th Annual IEEE Symposium on High-Performance Interconnects, 2007

2006
A portable real-time emulator for testing multi-radio MANETs.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005
Data Structure Optimization of AS_PATH in BGP.
Proceedings of the Networking and Mobile Computing, Third International Conference, 2005


  Loading...