Yifang Zhao

Orcid: 0009-0000-1874-4567

According to our database1, Yifang Zhao authored at least 8 papers between 2018 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2025
A Generalize Hardware Debugging Approach for Large Language Models Semi-Synthetic, Datasets.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2025

Enhancing LLM Performance on Hardware Design Generation Task via Reinforcement Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

TOPO-X: Co-optimize Flow Scheduling, Topology, and ML Training Parallelism.
Proceedings of the 34th International Conference on Computer Communications and Networks, 2025

Intelligence In The Fence: Construct A Privacy and Reliable Hardware Design Assistant LLM.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

FFCG: Effective and Fast Family Column Generation for Solving Large-Scale Linear Program.
Proceedings of the AAAI-25, Sponsored by the Association for the Advancement of Artificial Intelligence, February 25, 2025

2024
Poster: Enhance Hardware Domain Specific Large Language Model with Reinforcement Learning for Resilience.
Proceedings of the 2024 on ACM SIGSAC Conference on Computer and Communications Security, 2024

Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledge.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2018
Direction Guided Cooperative Coevolutionary Differential Evolution Algorithm for Cognitive Modelling of Ray Tracing in Separable High Dimensional Space.
Proceedings of the Advances in Brain Inspired Cognitive Systems, 2018


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