Yoshinori Shirakawa

According to our database, Yoshinori Shirakawa authored at least 3 papers between 2009 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

A Fully Integrated 60-GHz CMOS Transceiver Chipset Based on WiGig/IEEE 802.11ad With Built-In Self Calibration for Mobile Usage.

Noriaki Saito, Takayuki Tsukizawa, Naganori Shirakata, Tadashi Morita, Koichiro Tanaka, Junji Sato, Yohei Morishita, Masaki Kanemaru, Ryo Kitamura, Takahiro Shima, Toshifumi Nakatani, Kenji Miyanaga, Tomoya Urushihara, Hiroyuki Yoshikawa, Takenori Sakamoto, Hiroyuki Motozuka, Yoshinori Shirakawa, Naoya Yosoku, Akira Yamamoto, Ryosuke Shiozaki, Koji Takinami

IEEE J. Solid State Circuits, 2013

A fully integrated 60GHz CMOS transceiver chipset based on WiGig/IEEE802.11ad with built-in self calibration for mobile applications.

Takayuki Tsukizawa, Naganori Shirakata, Tadashi Morita, Koichiro Tanaka, Junji Sato, Yohei Morishita, Masaki Kanemaru, Ryo Kitamura, Takahiro Shima, Toshifumi Nakatani, Kenji Miyanaga, Tomoya Urushihara, Hiroyuki Yoshikawa, Takenori Sakamoto, Hiroyuki Motozuka, Yoshinori Shirakawa, Naoya Yosoku, Akira Yamamoto, Ryosuke Shiozaki, Noriaki Saito

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2009

A 14.6^th-order 3.456GHz transmit baseband filter in 110nm CMOS for millimeter-wave communication systems.

Michiko Tokumaru, Heiji Ikoma, Yuji Yamada, Koji Okamoto, Akira Yamamoto, Yoshinori Shirakawa

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009