Yu-Chuan Hou

Orcid: 0009-0006-1527-9608

According to our database¹, Yu-Chuan Hou authored at least 2 papers in 2025.

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2025

A 0.5-V 125-MHz 256-Kb 22-nm SRAM With 10-aJ/bit Active Energy and 10-pW/bit Shutdown Power.

[DOI]

IEEE J. Solid State Circuits, August, 2025

On the Data Dependency of the Read Speed of Low-Voltage SRAM with VSS-Assist Circuitry.

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025