Yuan-Sheng Lee

According to our database, Yuan-Sheng Lee authored at least 5 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A 103 fJ/b/dB, 10-26 Gb/s Receiver With a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement.

Yao-Chia Liu, Wei-Zen Chen, Yuan-Sheng Lee, Yu-Hsiang Chen, Shawn Ming, Ying-Hsi Lin

IEEE J. Solid State Circuits, October, 2023

2019

A 25-Gb/s, 2.1-pJ/bit, Fully Integrated Optical Receiver With a Baud-Rate Clock and Data Recovery.

Yuan-Sheng Lee, Wei-Hsiang Ho, Wei-Zen Chen

IEEE J. Solid State Circuits, 2019

2018

A 20-Gb/s, 2.4 pJ/bit, Fully Integrated Optical Receiver with a Baud-Rate Clock and Data Recovery.

Yuan-Sheng Lee, Wei-Zen Chen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2016

Incremental analysis for generalized TODIM.

Yuan-Sheng Lee, Hsu-Shih Shih

Central Eur. J. Oper. Res., 2016

2014

Thermal-aware Dynamic Buffer Allocation for Proactive routing algorithm on 3D Network-on-Chip systems.

Yuan-Sheng Lee, Hsien-Kai Hsin, Kun-Chih Chen, En-Jui Chang, An-Yeu Andy Wu

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014