Yuan-Yu Huang

According to our database¹, Yuan-Yu Huang authored at least 2 papers between 2025 and 2026.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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Bibliography

2026

Energy-Efficient All-Digital Computation-in-Memory Macro Design with CFeFET-based Booth Decoder.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025

Design Navigation and Exploration of Complementary Ferroelectric FET (CFeFET) for Next-Generation CFET-based Nonvolatile SRAM and Logic-in-Memory Applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025

Yuan-Yu Huang

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