Yue Jiet Chong
Orcid: 0009-0001-7679-4252
According to our database1,
Yue Jiet Chong authored at least 5 papers
between 2025 and 2026.
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Bibliography
2026
JADE: Joint Architecture-Dataflow Exploration for LLM Inference on Heterogeneous In- and Near-Memory Computing Systems.
IEEE J. Emerg. Sel. Topics Circuits Syst., June, 2026
Topology-Mapping Co-Design for Scalable LLM Accelerators with Hierarchical Mesh-of-Trees NoC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
PRIMAL: Processing-In-Memory based Low-Rank Adaptation for LLM Inference Accelerator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
2025
PICNIC: Silicon Photonic Interconnected Chiplets with Computational Network and In-memory Computing for LLM Inference Acceleration.
CoRR, November, 2025
LEAP: LLM Inference on Scalable PIM-NoC Architecture with Balanced Dataflow and Fine-Grained Parallelism.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025