Yuji Nakajima

According to our database, Yuji Nakajima authored at least 7 papers between 2000 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Editing Compression Dictionaries toward Refined Compression-Based Feature-Space.

Hisashi Koga, Shota Ouchi, Yuji Nakajima

Inf., 2022

2016

Effective construction of compression-based feature space.

Hisashi Koga, Yuji Nakajima, Takahisa Toda

Proceedings of the 2016 International Symposium on Information Theory and Its Applications, 2016

2013

A 7-bit, 1.4 GS/s ADC With Offset Drift Suppression Techniques for One-Time Calibration.

Yuji Nakajima, Norihito Kato, Akemi Sakaguchi, Toshio Ohkido, Takahiro Miki

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012

A 7b 1.4GS/s ADC with offset drift suppression techniques for one-time calibration.

Yuji Nakajima, Norihito Kato, Akemi Sakaguchi, Toshio Ohkido, Kenji Shimomaki, Hiroko Masuda, Chikahiro Shiroma, Michio Yotsuyanagi, Takahiro Miki

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

Data converter techniques.

Ron Kapusta, Yuji Nakajima

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2010

A Background Self-Calibrated 6b 2.7 GS/s ADC With Cascade-Calibrated Folding-Interpolating Architecture.

Yuji Nakajima, Akemi Sakaguchi, Toshio Ohkido, Norihito Kato, Tetsuya Matsumoto, Michio Yotsuyanagi

IEEE J. Solid State Circuits, 2010

2000

A 12-ns 8-Mbyte DRAM secondary cache for a 64-bit microprocessor.

Takashi Okuda, Isao Naritake, Tadahiko Sugibayashi, Yuji Nakajima, Tatsunori Murotani

IEEE J. Solid State Circuits, 2000