Norihito Kato

According to our database1, Norihito Kato authored at least 8 papers between 2010 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Circuit Techniques to Improve Low-Light Characteristics and High-Accuracy Evaluation System for CMOS Image Sensor.
Sensors, 2022

A 30.2-µ Vrms Horizontal Streak Noise 8.3-Mpixel 60-Frames/s CMOS Image Sensor With Skew-Relaxation ADC and On-Chip Testable Ramp Generator for Surveillance Camera.
IEEE J. Solid State Circuits, 2022

High Accuracy Test Techniques with Fine Pattern Generator and Ramp Test Circuit for CMOS Image Sensor.
IEICE Trans. Electron., 2022

2021
A CMOS Image Sensor and an AI Accelerator for Realizing Edge-Computing-Based Surveillance Camera Systems.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

A Low Noise and Linearity Improvement CMOS Image Sensor for Surveillance Camera with Skew-Relaxation Local Multiply Circuit and On-Chip Testable Ramp Generator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2013
A 7-bit, 1.4 GS/s ADC With Offset Drift Suppression Techniques for One-Time Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012
A 7b 1.4GS/s ADC with offset drift suppression techniques for one-time calibration.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2010
A Background Self-Calibrated 6b 2.7 GS/s ADC With Cascade-Calibrated Folding-Interpolating Architecture.
IEEE J. Solid State Circuits, 2010


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