Yuki Fukazawa

According to our database1, Yuki Fukazawa authored at least 8 papers between 2013 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Tile/line access cache memory based on a multi-level Z-order tiling data layout.
Concurr. Comput. Pract. Exp., 2018

2016
SIMD-based datapath with efficient operation structure for motion estimation.
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

A Rapid Verification Framework for Developing Multi-core Processor.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

A cache memory with unit tile and line accessibility.
Proceedings of the 15th IEEE/ACIS International Conference on Computer and Information Science, 2016

2015
An Architectural Framework of Snoopy Interconnection for Heterogeneous Cache Systems.
Proceedings of the Third International Symposium on Computing and Networking, 2015

Register Port Prediction for a Banked Register File.
Proceedings of the Third International Symposium on Computing and Networking, 2015

A fault tolerant response analyzer with self-error-correction capability.
Proceedings of the 20th IEEE European Test Symposium, 2015

2013
A Transient Fault Tolerant Test Pattern Generator for On-line Built-in Self-Test.
Proceedings of the 22nd Asian Test Symposium, 2013


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