Yukio Akazawa
According to our database1,
Yukio Akazawa
authored at least 4 papers
between 1994 and 1998.
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Bibliography
1998
IEEE J. Solid State Circuits, 1998
1995
IEEE J. Solid State Circuits, December, 1995
1994
IEEE J. Solid State Circuits, December, 1994
A monolithic 156 Mb/s clock and data recovery PLL circuit using the sample-and-hold technique.
IEEE J. Solid State Circuits, December, 1994