Noboru Ishihara

According to our database1, Noboru Ishihara authored at least 34 papers between 2007 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
High-Sensitivity Inertial Sensor Module to Measure Hidden Micro Muscular Sounds.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

2018
A 0.18-µm CMOS time-domain capacitive-sensor interface for sub-1mG MEMS accelerometers.
IEICE Electron. Express, 2018

2017
A - 244-dB FOM High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL With Sub-ppb-Order Channel-Adjusting Technique.
IEEE J. Solid State Circuits, 2017

Estimation of energy self-sufficiency rate by EMS simulation using SPICE.
Proceedings of the International Conference on Information and Communication Technology Convergence, 2017

Design of high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
An 8.865-GHz -244dB-FOM high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Environmental Data Recovery using Polynomial Regression for Large-scale Wireless Sensor Networks.
Proceedings of the SENSORNETS 2016, 2016

Simulation and evaluation of PV power generation for energy management system using SPICE.
Proceedings of the International Conference on Information and Communication Technology Convergence, 2016

2015
RF-Powered Transceiver With an Energy- and Spectral-Efficient IF-Based Quadrature Backscattering Transmitter.
IEEE J. Solid State Circuits, 2015

13.8 A 5.8GHz RF-powered transceiver with a 113μW 32-QAM transmitter employing the IF-based quadrature backscattering technique.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 0.5-V 1.56-mW 5.5-GHz RF transceiver IC module with J-shaped folded monopole antenna.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A 0.5-V 5.8-GHz low-power asymmetrical QPSK/OOK transceiver for wireless sensor network.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
A Sub-1mW Class-C-VCO-Based Low Voltage PLL with Ultra-Low-Power Digitally-Calibrated ILFD in 65nm CMOS.
IEICE Trans. Electron., 2014

An ultra low power pH-monitoring IC with a duty-cycling wireless FM-transmitter.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

An ultra-low-power RF transceiver with a 1.5-pJ/bit maximally-digital impulse-transmitter and an 89.5-μW super-regenerative RSSI.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

A 0.52-V 5.7-GHz low noise sub-sampling PLL with dynamic threshold MOSFET.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

A 0.5-V 2.5-GHz high-gain low-power regenerative amplifier based on Colpitts oscillator topology in 65-nm CMOS.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013
A 60GHz 3-dB tandem coupler using offset broadside-coupled lines on a silicon substrate.
IEICE Electron. Express, 2013

A process-scalable RF transmitter using 90nm and 65nm Si CMOS.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

Challenges in integration of diverse functionalities on CMOS.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
A Ring-VCO-Based Injection-Locked Frequency Multiplier with Novel Pulse Generation Technique in 65 nm CMOS.
IEICE Trans. Electron., 2012

RF signal generator using time domain harmonic suppression technique in 90nm CMOS.
IEICE Electron. Express, 2012

Injection-locked fractional frequency multiplier with automatic reference pulse-selection technique.
IEICE Electron. Express, 2012

Optimal design method for chip-area-efficient CMOS low-dropout regulator.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011
RF CMOS Integrated Circuit: History, Current Status and Future Prospects.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

A 21 V output charge pump circuit with appropriate well-bias supply technique in 0.18 μm Si CMOS.
Proceedings of the International SoC Design Conference, 2011

A ring-VCO-based injection-locked frequency multiplier using a new pulse generation technique in 65 nm CMOS.
Proceedings of the International SoC Design Conference, 2011

2010
Wide-band, high linear low noise amplifier design in 0.18um CMOS technology.
IEICE Electron. Express, 2010

2009
Physical design challenges to nano-CMOS circuits.
IEICE Electron. Express, 2009

A low-phase-noise injection-locked differential ring-VCO with half-integral subharmonic locking in 0.18 µm CMOS.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

Design of CMOS inverter-based output buffers adapting the cherry-hooper broadbanding technique.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008
A 1ps-Resolution 2ns-Span 10Gb/s Data-Timing Generator with Spectrum Conversion.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
<i>V</i><sub>dd</sub> Gate Biasing RF CMOS Amplifier Design Technique Based on the Effect of Carrier Velocity Saturation.
IEICE Trans. Electron., 2007


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