Yul Chu

According to our database, Yul Chu authored at least 25 papers between 1996 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Resource allocation for MEC system with multi-users resource competition based on deep reinforcement learning approach.

Bin Qu, Yan Bai, Yul Chu, Li-e Wang, Feng Yu, Xianxian Li

Comput. Networks, 2022

2017

A flexible multi-core functional cache simulator (FM-SIM).

Rano Mal, Yul Chu

Proceedings of the Summer Simulation Multi-Conference, 2017

2015

Accuracy Enhanced Distributed Sparse Matrix Solver with Block-Based Pivoting for Large Linear Systems.

Esteban Torres, Yul Chu, Jin Hwan Park

Proceedings of the 2015 IEEE 12th Intl Conf on Ubiquitous Intelligence and Computing and 2015 IEEE 12th Intl Conf on Autonomic and Trusted Computing and 2015 IEEE 15th Intl Conf on Scalable Computing and Communications and Its Associated Workshops (UIC-ATC-ScalCom), 2015

2014

Dual-access way-prediction cache for embedded systems.

Yul Chu, Jin Hwan Park

EURASIP J. Embed. Syst., 2014

2013

A Buffered Dual-Access-Mode Scheme Designed for Low-Power Highly-Associative Caches.

Yul Chu, Marven Calagos

Int. J. Embed. Real Time Commun. Syst., 2013

A Study for a Low-Power Way Predictor for Embedded Data Caches.

Yul Chu

Proceedings of the Advanced Technologies, Embedded and Multimedia for Human-centric Computing, 2013

2012

A parallel simulator for network terminal packet buffer.

Yul Chu, Jin Hwan Park, Yan Bai, Jae Sok Son, Sanjeev Kumar

Simul., 2012

2009

A Case for a Packet Management in a Network Terminal.

Yul Chu, Yan Bai, Amit Uppal, Jae Sok Son

Proceedings of the International Conference on Networking, Architecture, and Storage, 2009

An Efficient Networking Management for a Protocol Processor.

Yul Chu, Amit Uppal

Proceedings of the Third International Conference on the Digital Society (ICDS 2009), 2009

A Dynamic Packet Management in a Protocol Processor.

Yul Chu, Amit Uppal, Jae Sok Son

Proceedings of the Computational Science and Its Applications, 2009

2007

Modeling of Trace- and Block-Based Caches.

Azam Beg, Yul Chu

J. Circuits Syst. Comput., 2007

Packet Buffer Management for a High-Speed Network Interface Card.

Shalini Batra, Yul Chu, Yan Bai

Proceedings of the 16th International Conference on Computer Communications and Networks, 2007

2006

A low-power cache scheme for embedded computing.

Yul Chu, Arul Sandeep Gade, Abhishek Bhaduri

J. Embed. Comput., 2006

A Case for Dual-Mapping One-Way Caches.

Arul Sandeep Gade, Yul Chu

Proceedings of the Architecture of Computing Systems, 2006

A Shared-Memory Packet Buffer Management in a Network Interface Card.

Amit Uppal, Yul Chu

Proceedings of the Management of Convergence Networks and Services, 2006

2005

A Study for a Dynamic Branch Target-Prefetching Scheme.

Srinivas Damodara, Yul Chu

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2005

An Enhanced Dynamic Packet Buffer Management.

Vinod Rajan, Yul Chu

Proceedings of the 10th IEEE Symposium on Computers and Communications (ISCC 2005), 2005

Energy savings for data caches: ELRU-SEQ replacement policy.

Saibhushan Musalappa, Shivakumar Sundaram, Yul Chu

Proceedings of the 24th IEEE International Performance Computing and Communications Conference, 2005

On Achieving Efficiency and Fairness in Video Transportation.

Yan Bai, Yul Chu, Mabo Robert Ito

Proceedings of the Networking, 2005

A Study for Packet Buffer Algorithms for a Protocol Processor.

Vinod Rajan, Yul Chu

Proceedings of the Third International Conference on Information Technology and Applications (ICITA 2005), 2005

A Simple Project for Teaching Instruction Set Architecture.

Yul Chu

Proceedings of the 5th IEEE International Conference on Advanced Learning Technologies, 2005

A Replacement Policy to Save Energy for Data Cache.

Saibhushan Musalappa, Shivakumar Sundaram, Yul Chu

Proceedings of the 19th Annual International Symposium on High Performance Computing Systems and Applications (HPCS 2005), 2005

2001

An Efficient Indirect Branch Predictor.

Yul Chu, Mabo Robert Ito

Proceedings of the Euro-Par 2001: Parallel Processing, 2001

2000

A 2-Way Thrashing-Avoidance Cache (TAC): An Efficient Instruction Cache Scheme for Object-Oriented Languages.

Yul Chu, Mabo Robert Ito

Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

1996

Parallel SOLVE for direct circuit simulation on a transputer array.

Yul Chu, Ausif Mahmood, Donald J. Lynch

Proceedings of the 3rd International Conference on High Performance Computing, 1996