Azam Beg

According to our database1, Azam Beg authored at least 41 papers between 2006 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.



In proceedings 
PhD thesis 




DPV: a taxonomy for utilizing deep learning as a prediction technique for various types of cancers detection.
Multim. Tools Appl., 2021

Deep learning neural networks for medical image segmentation of brain tumours for diagnosis: a recent review and taxonomy.
J. Ambient Intell. Humaniz. Comput., 2021

Accurate Calculation of Unreliability of CMOS Logic Cells and Circuits.
J. Circuits Syst. Comput., 2020

AI Enabled Resource Allocation in Future Mobile Networks.
Proceedings of the NOMS 2020, 2020

Using open technologies for automatically creating question-and-answer sets for engineering MOOCs.
Comput. Appl. Eng. Educ., 2018

A 2.6 mW Single-Ended Positive Feedback LNA for 5G Applications.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Using simulators for teaching computer organization and architecture.
Comput. Appl. Eng. Educ., 2016

Incorporating hardware and software features into a prediction model for processor-system throughput.
Comput. Appl. Eng. Educ., 2016

Auto-Generating Publication-Quality Circuit Schematics Using Open Technologies.
Proceedings of the 21st Western Canadian Conference on Computing Education, 2016

On the reliability estimation of nano-circuits using neural networks.
Microprocess. Microsystems, 2015

Automating the sizing of transistors in CMOS gates for low-power and high-noise margin operation.
Int. J. Circuit Theory Appl., 2015

What Soft Skills Software Architect Should Have? A Reflection from Software Industry.
CoRR, 2015

A web-based method for building and simulating standard cell circuits - A classroom application.
Comput. Appl. Eng. Educ., 2015

XOR gates for low-energy and near-Vth operation.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Comparison and design of VCOs for ultra-low power CMOS temperature sensors.
Proceedings of the International Conference on Communications, 2015

Designing array-based CMOS logic gates by using a feedback control system.
Proceedings of the 2014 IEEE International Conference on Systems, Man, and Cybernetics, 2014

Incorporating simulation tools in the teaching of digital logic design.
Proceedings of the 2014 IEEE International Conference on Control System, 2014

Automating the CMOS Gate Sizing for Reduced Power/Energy.
Proceedings of the 12th International Conference on Frontiers of Information Technology, 2014

A New Method for the Creation of MOOC-ready Database of Test Questions .
Proceedings of the CSEDU 2014, 2014

Enhancing static noise margin while reducing power consumption.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Enabling sizing for enhancing the static noise margins.
Proceedings of the International Symposium on Quality Electronic Design, 2013

Automatic generation of characterization circuits - An application in academia.
Proceedings of the IEEE Frontiers in Education Conference, 2013

A collaborative platform for facilitating standard cell characterization.
Proceedings of the 2013 IEEE 17th International Conference on Computer Supported Cooperative Work in Design (CSCWD), 2013

Optimum Reliability Sizing for Complementary Metal Oxide Semiconductor Gates.
IEEE Trans. Reliab., 2012

On pedagogy of nanometric circuit reliability.
J. Supercomput., 2012

GREDA: A Fast and More Accurate Gate Reliability EDA Tool.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

A neural model for processor-throughput using hardware parameters and software's dynamic behavior.
Proceedings of the 12th International Conference on Intelligent Systems Design and Applications, 2012

On axon-inspired communications.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

Prediction of area and length complexity measures for binary decision diagrams.
Expert Syst. Appl., 2010

On NOR-2 von Neumann multiplexing.
Proceedings of the 5th International Design and Test Workshop, 2010

Hybrid OCR Techniques for Cursive Script Languages - A Review and Applications.
Proceedings of the Second International Conference on Computational Intelligence, 2010

Investigating data preprocessing methods for circuit complexity models.
Expert Syst. Appl., 2009

PerfPred: A web-based tool for exploring computer architecture design space.
Comput. Appl. Eng. Educ., 2009

Improving Nano-circuit Reliability Estimates by Using Neural Methods.
Proceedings of the Nano-Net - 4th International ICST Conference, 2009

Applicability of feed-forward and recurrent neural networks to Boolean function complexity modeling.
Expert Syst. Appl., 2008

Utilizing synthesis to verify Boolean function models.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A Speech Recognition System for Urdu Language.
Proceedings of the Wireless Networks, 2008

An Efficient Realization of an OCR System Using HDL.
Proceedings of the 2008 International Conference on Artificial Intelligence, 2008

Binary Decision Diagrams and neural networks.
J. Supercomput., 2007

Modeling of Trace- and Block-Based Caches.
J. Circuits Syst. Comput., 2007

Modelling the XOR/XNOR Boolean Functions Complexity Using Neural Network.
Proceedings of the 13th IEEE International Conference on Electronics, 2006