Yung-Yuan Chen

According to our database, Yung-Yuan Chen authored at least 32 papers between 1990 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Development of an Effective Corruption-Related Scenario-Based Testing Approach for Robustness Verification and Enhancement of Perception Systems in Autonomous Driving.

Hsiang Huang, Yung-Yuan Chen

Sensors, 2024

2021

SoC-Level Safety-Oriented Design Process in Electronic System Level Development Environment.

Kuen-Long Lu, Yung-Yuan Chen

J. Circuits Syst. Comput., 2021

Intelligent Traffic Control System by Using Image Information.

Zong-Ming Lin, Cheng-Yang Chang, Chin-Yu Hu, Yung-Yuan Chen

CoRR, 2021

Model-based design, analysis and assessment framework for safety-critical systems.

Kuen-Long Lu, Yung-Yuan Chen

Proceedings of the 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2021

2020

Automotive Ethernet-Based Black Box System.

Yan-Xun LU, Yung-Yuan Chen, Wen-Nan Fang

Proceedings of the 2020 International Conference on Artificial Intelligence in Information and Communication, 2020

Analysis of the Effect of Automotive Ethernet Camera Image Quality on Object Detection Models.

Hsiang Huang, Kuan-Chung Chen, Po-Yi Li, Yung-Yuan Chen

Proceedings of the 2020 International Conference on Artificial Intelligence in Information and Communication, 2020

2019

ISO 26262 ASIL-Oriented Hardware Design Framework for Safety-Critical Automotive Systems.

Kuen-Long Lu, Yung-Yuan Chen

Proceedings of the 2019 IEEE International Conference on Connected Vehicles and Expo, 2019

2018

FMEDA-Based Fault Injection and Data Analysis in Compliance with ISO-26262.

Kuen-Long Lu, Yung-Yuan Chen, Li-Ren Huang

Proceedings of the 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2018

2016

An Effective Two-Level Redundancy Approach for FlexRay Network Systems.

Yung-Yuan Chen, Kuen-Long Leu

Proceedings of the 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2016

2015

An intelligent brake-by-wire system design and analysis in accordance with ISO-26262 functional safety standard.

Kuen-Long Leu, Hsiang Huang, Yung-Yuan Chen, Li-Ren Huang, Kung-Ming Ji

Proceedings of the International Conference on Connected Vehicles and Expo, 2015

An effective multiple-level fault-tolerant framework for FlexRay network systems.

Hsiang Huang, Kuen-Long Leu, Yung-Yuan Chen

Proceedings of the International Conference on Connected Vehicles and Expo, 2015

2012

ECU-level fault-tolerant framework for safety-critical FlexRay network systems.

Yung-Yuan Chen, Chia-Ming Lyu

Proceedings of the International Conference on Information and Communication Technology Convergence, 2012

Generic Reliability Analysis for Safety-Critical FlexRay Drive-By-Wire Systems.

Kuen-Long Leu, Jwu-E Chen, Chin-Long Wey, Yung-Yuan Chen

Proceedings of the 2012 International Conference on Connected Vehicles and Expo, 2012

2010

Reliable data path design of VLIW processor cores with comprehensive error-coverage assessment.

Yung-Yuan Chen, Kuen-Long Leu

Microprocess. Microsystems, 2010

2009

Robustness investigation of the FlexRay system.

Kuen-Long Leu, Chin-Long Wey, Jwu-E Chen, Yung-Yuan Chen

Proceedings of the IEEE Fourth International Symposium on Industrial Embedded Systems, 2009

SoC-level risk assessment using FMEA approach in system design with SystemC.

Yung-Yuan Chen, Chung-Hsien Hsu, Kuen-Long Leu

Proceedings of the IEEE Fourth International Symposium on Industrial Embedded Systems, 2009

2008

An Estimation Model of Vulnerability for Embedded Microprocessors.

Yung-Yuan Chen, Shu-Hao Hsu, Kuen-Long Leu

Proceedings of the Second International Conference on Secure System Integration and Reliability Improvement, 2008

System-Bus Fault Injection Framework in SystemC Design Platform.

Kun-Chun Chang, Yi-Chinag Wang, Chung-Hsien Hsu, Kuen-Long Leu, Yung-Yuan Chen

Proceedings of the Second International Conference on Secure System Integration and Reliability Improvement, 2008

An Online Control Flow Check for VLIW Processor.

Hung-Chuan Lai, Shi-Jinn Horng, Yung-Yuan Chen

Proceedings of the 14th IEEE Pacific Rim International Symposium on Dependable Computing, 2008

2006

Fault-Tolerant VLIW Processor Design and Error Coverage Analysis.

Yung-Yuan Chen, Kuen-Long Leu, Chao-Sung Yeh

Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2006

Hybrid Error-Detection Approach with No Detection Latency for High-Performance Microprocessors.

Yung-Yuan Chen, Kuen-Long Leu, Li-Wen Lin

Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, 2006

2005

Concurrent Detection of Control Flow Errors by Hybrid Signature Monitoring.

Yung-Yuan Chen

IEEE Trans. Computers, 2005

2004

Incorporating Signature-Monitoring Technique in VLIW Processors.

Yung-Yuan Chen, Kun-Feng Chen

Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004

2003

An Integrated Fault-Tolerant Design Framework for VLIW Processors.

Yung-Yuan Chen, Shi-Jinn Horng, Hung-Chuan Lai

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

1999

Concurrent Detection of Processor Control Errors by Hybrid Signature Monitoring.

Yung-Yuan Chen

Proceedings of the Dependable Computing, 1999

1997

A Comprehensive Reconfiguration Scheme for Fault-Tolerant VLSI/WSI Array Processors.

Yung-Yuan Chen, Shambhu J. Upadhyaya, Ching-Hwa Cheng

IEEE Trans. Computers, 1997

1995

An efficient switching network fault diagnosis for reconfigurable VLSI/WSI array processors.

Yung-Yuan Chen, Ching-Hwa Cheng, Jwu-E Chen

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

1994

Modeling the Reliability of a Class of Fault-Tolerant VLSI/WSI Systems Based on Multiple-Level Redundancy.

Yung-Yuan Chen, Shambhu J. Upadhyaya

IEEE Trans. Computers, 1994

An Effective Reconfiguration Process for Fault-Tolerant VLSI/WSI Array Processors.

Yung-Yuan Chen, Ching-Hwa Cheng, Yung-Ci Chou

Proceedings of the Dependable Computing, 1994

1993

Yield Analysis of Reconfigurable Array Processors Based on Multiple-Level Redundancy.

Yung-Yuan Chen, Shambhu J. Upadhyaya

IEEE Trans. Computers, 1993

Reliability, Reconfiguration, and Spare Allocation Issues in Binary-Tree Architectures Based on Multiple-Level Redundancy.

Yung-Yuan Chen, Shambhu J. Upadhyaya

IEEE Trans. Computers, 1993

1990

An analysis of a reconfigurable binary tree architecture based on multiple-level redundancy.

Yung-Yuan Chen, Shambhu J. Upadhyaya

Proceedings of the 20th International Symposium on Fault-Tolerant Computing, 1990