Yusuke Funaya

According to our database, Yusuke Funaya authored at least 4 papers between 2009 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

Effects of 3-D stacked vector cache on energy consumption.

Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Yusuke Endo, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi

Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010

Cache partitioning strategies for 3-D stacked vector processors.

Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi

Proceedings of the IEEE International Conference on 3D System Integration, 2010

Design and early evaluation of a 3-D die stacked chip multi-vector processor.

Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi

Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009

3D on-chip memory for the vector architecture.

Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi

Proceedings of the IEEE International Conference on 3D System Integration, 2009