Hiroaki Kobayashi

Orcid: 0000-0002-3350-1413

According to our database1, Hiroaki Kobayashi authored at least 210 papers between 1978 and 2023.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Door Opening and Closing Considering Forces Using a Mobile Manipulator with an Admittance Controlled Arm.
J. Robotics Mechatronics, December, 2023

An Efficient Reference Image Sharing Method for the Image-Division Parallel Video Encoding Architecture.
IEICE Trans. Electron., June, 2023

Ising-Based Kernel Clustering.
Algorithms, April, 2023

CNN-based blind SIR classification framework for STPA-BAA spectrum superposing.
ICT Express, February, 2023

A dynamic parameter tuning method for SpMM parallel execution.
Concurr. Comput. Pract. Exp., 2023

Investigating the Characteristics of Ising Machines.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

A Constraint Partition Method for Combinatorial Optimization Problems.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

Appropriate Graph-Algorithm Selection for Edge Devices Using Machine Learning.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

I/O Performance Evaluation of a Memory-Saving DNS Code on SX-Aurora TSUBASA.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

iWAPT2023 Keynote Speaker QC & HPC hybrid computing for simulation & data-analysis hybrid applications.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

Multi-scale Loss based Electron Microscopic Image Pair Matching Method.
Proceedings of the International Conference on Machine Learning and Applications, 2023

Performance Evaluation of Tsunami Evacuation Route Planning on Multiple Annealing Machines.
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022
A Metadata Prefetching Mechanism for Hybrid Memory Architectures.
IEICE Trans. Electron., 2022

Page-Address Coalescing of Vector Gather Instructions for Efficient Address Translation.
Proceedings of the 12th IEEE/ACM Workshop on Irregular Applications: Architectures and Algorithms, 2022

A Partitioned Memory Architecture with Prefetching for Efficient Video Encoders.
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2022

Analysis of Precision Vectors for Ising-Based Linear Regression.
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2022

High-Performance GraphBLAS Backend Prototype for NEC SX-Aurora TSUBASA.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2022

2021
VGL: a high-performance graph processing framework for the NEC SX-Aurora TSUBASA vector architecture.
J. Supercomput., 2021

Optimizing Load Balance in a Parallel CFD Code for a Large-scale Turbine Simulation on a Vector Supercomputer.
Supercomput. Front. Innov., 2021

Performance and Power Analysis of a Vector Computing System.
Supercomput. Front. Innov., 2021

Distributed Graph Algorithms for Multiple Vector Engines of NEC SX-Aurora TSUBASA Systems.
Supercomput. Front. Innov., 2021

Efficient Mixed-Precision Tall-and-Skinny Matrix-Matrix Multiplication for GPUs.
Int. J. Netw. Comput., 2021

An External Definition of the One-Hot Constraint and Fast QUBO Generation for High-Performance Combinatorial Clustering.
Int. J. Netw. Comput., 2021

Register Flush-free Runahead Execution for Modern Vector Processors.
Proceedings of the 33rd IEEE International Symposium on Computer Architecture and High Performance Computing, 2021

Optimizations of a Linear Matrix Solver in a Composite Simulation for a Vector Computer.
Proceedings of the 12th International Symposium on Parallel Architectures, 2021

Ising-Based Combinatorial Clustering Using the Kernel Method.
Proceedings of the 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2021

A Processor Selection Method based on Execution Time Estimation for Machine Learning Programs.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021

An Externally-Constrained Ising Clustering Method for Material Informatics.
Proceedings of the Ninth International Symposium on Computing and Networking, 2021

2020
Effects of Using a Memory Stalled Core for Handling MPI Communication Overlapping in the SOR Solver on SX-ACE and SX-Aurora TSUBASA.
Supercomput. Front. Innov., 2020

Computationally Efficient SLM based PAPR Reduction for STPA-BAA Scheme.
Proceedings of the 23rd International Symposium on Wireless Personal Multimedia Communications, 2020

A Dynamic Parameter Tuning Method for High Performance SpMM.
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2020

A Deep Reinforcement Learning Based Feature Selector.
Proceedings of the Parallel Architectures, Algorithms and Programming, 2020

I/O Performance of the SX-Aurora TSUBASA.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Importance of Selecting Data Layouts in the Tsunami Simulation Code.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

An Efficient Skinny Matrix-Matrix Multiplication Method by Folding Input Matrices into Tensor Core Operations.
Proceedings of the Eighth International Symposium on Computing and Networking Workshops, 2020

Combinatorial Clustering Based on an Externally-Defined One-Hot Constraint.
Proceedings of the Eighth International Symposium on Computing and Networking, 2020

Energy-efficient Design of an STT-RAM-based Hybrid Cache Architecture.
Proceedings of the 2020 IEEE Symposium in Low-Power and High-Speed Chips, 2020

Optimization of the Himeno Benchmark for SX-Aurora TSUBASA.
Proceedings of the Benchmarking, Measuring, and Optimizing, 2020

2019
Performance Evaluation of Different Implementation Schemes of an Iterative Flow Solver on Modern Vector Machines.
Supercomput. Front. Innov., 2019

A Skewed Multi-banked Cache for Many-core Vector Processors.
Supercomput. Front. Innov., 2019

An Energy-aware Dynamic Data Allocation Mechanism for Many-channel Memory Systems.
Supercomput. Front. Innov., 2019

Optimizing Memory Layout of Hyperplane Ordering for Vector Supercomputer SX-Aurora TSUBASA.
Proceedings of the 2019 IEEE/ACM Workshop on Memory Centric High Performance Computing, 2019

A Hardware Prefetching Mechanism for Vector Gather Instructions.
Proceedings of the 9th IEEE/ACM Workshop on Irregular Applications: Architectures and Algorithms, 2019

Analysis of Relationship Between SIMD-Processing Features Used in NVIDIA GPUs and NEC SX-Aurora TSUBASA Vector Processors.
Proceedings of the Parallel Computing Technologies, 2019

An Appropriate Computing System and Its System Parameters Selection Based on Bottleneck Prediction of Applications.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

Performance Evaluation of Tsunami Inundation Simulation on SX-Aurora TSUBASA.
Proceedings of the Computational Science - ICCS 2019, 2019

A Layer-Adaptable Cache Hierarchy by a Multiple-layer Bypass Mechanism.
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019

Perceptron-based Cache Bypassing for Way-Adaptable Caches.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019

2018
An Adjacent-Line-Merging Writeback Scheme for STT-RAM-Based Last-Level Caches.
IEEE Trans. Multi Scale Comput. Syst., 2018

Real-time tsunami inundation forecast system for tsunami disaster prevention and mitigation.
J. Supercomput., 2018

Developing Efficient Implementations of Bellman-Ford and Forward-Backward Graph Algorithms for NEC SX-ACE.
Supercomput. Front. Innov., 2018

A Machine Learning-Based Approach for Selecting SpMV Kernels and Matrix Storage Formats.
IEICE Trans. Inf. Syst., 2018

Performance evaluation of a vector supercomputer SX-aurora TSUBASA.
Proceedings of the International Conference for High Performance Computing, 2018

Proposal of Detour Path Suppression Method in PS Reinforcement Learning and Its Application to Altruistic Multi-agent Environment.
Proceedings of the PRIMA 2018: Principles and Practice of Multi-Agent Systems - 21st International Conference, Tokyo, Japan, October 29, 2018

Search Space Reduction for Parameter Tuning of a Tsunami Simulation on the Intel Knights Landing Processor.
Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018

Proposal and Evaluation of an Indirect Reward Assignment Method for Reinforcement Learning by Profit Sharing Method.
Proceedings of the Intelligent Systems and Applications, 2018

An energy-aware set-level refreshing mechanism for eDRAM last-level caches.
Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018

2017
Potential of a modern vector supercomputer for practical applications: performance evaluation of SX-ACE.
J. Supercomput., 2017

Proposal of PSwithEFP and its Evaluation in Multi-Agent Reinforcement Learning.
J. Adv. Comput. Intell. Intell. Informatics, 2017

Toward Dynamic Load Balancing across OpenMP Thread Teams for Irregular Workloads.
Int. J. Netw. Comput., 2017

A Directive Generation Approach to High Code-Maintainability for Various HPC Systems.
Int. J. Netw. Comput., 2017

Energy-Performance Modeling of Speculative Checkpointing for Exascale Systems.
IEICE Trans. Inf. Syst., 2017

An application-adaptive data allocation method for multi-channel memory.
Proceedings of the 2017 IEEE Symposium in Low-Power and High-Speed Chips, 2017

An Adjacent-Line-Merging Writeback Scheme for STT-RAM last-level caches.
Proceedings of the 2017 IEEE Symposium in Low-Power and High-Speed Chips, 2017

Panel discussions: "Cool chips for the next decade".
Proceedings of the 2017 IEEE Symposium in Low-Power and High-Speed Chips, 2017

Performance Evaluation of Quantum ESPRESSO on NEC SX-ACE.
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

Vectorization-Aware Loop Optimization with User-Defined Code Transformations.
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

Performance and Power Analysis of SX-ACE Using HP-X Benchmark Programs.
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

2016
Parallel Processing Model for Cholesky Decomposition Algorithm in AlgoWiki Project.
Supercomput. Front. Innov., 2016

Effects of Stacking Granularity on 3-D Stacked Floating-point Fused Multiply Add Units.
SIGARCH Comput. Archit. News, 2016

A Memory-Efficient Implementation of a Plasmonics Simulation Application on SX-ACE.
Int. J. Netw. Comput., 2016

Translation of Large-Scale Simulation Codes for an OpenACC Platform Using the Xevolver Framework.
Int. J. Netw. Comput., 2016

A Code Selection Mechanism Using Deep Learning.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Proposal and Evaluation of an Action Selection Strategy with Expected Failure Probability in Multi-agent Learning.
Proceedings of the IEEE International Conference on Agents, 2016

The Importance of Dynamic Load Balancing among OpenMP Thread Teams for Irregular Workloads.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

A Directive Generation Approach Using User-Defined Rules.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

A User-Defined Code Transformation Approach to Overlapping MPI Communication with Computation.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

Proposal of an Action Selection Strategy with Expected Failure Probability and Its Evaluation in Multi-agent Reinforcement Learning.
Proceedings of the Multi-Agent Systems and Agreement Technologies, 2016

A cache partitioning mechanism to protect shared data for CMPs.
Proceedings of the 2016 IEEE Symposium in Low-Power and High-Speed Chips, 2016

A power-aware LLC control mechanism for the 3D-stacked memory system.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

2015
Optimized Data Transfers Based on the OpenCL Event Management Mechanism.
Sci. Program., 2015

Identification and Elimination of Platform-Specific Code Smells in High Performance Computing Applications.
Int. J. Netw. Comput., 2015

FLEXII: A Flexible Insertion Policy for Dynamic Cache Resizing Mechanisms.
IEICE Trans. Electron., 2015

A Light-Weight Rollback Mechanism for Testing Kernel Variants in Auto-Tuning.
IEICE Trans. Inf. Syst., 2015

Adaptive impedance control of a variable stiffness actuator.
Adv. Robotics, 2015

A Visualization Technique to Support Searching and Comparing Features of Multivariate Datasets.
Proceedings of the 19th International Conference on Information Visualisation, 2015

Design of tendon-driven mechanisms for fault tolerance from tendon-breaking by using centroid vectors.
Proceedings of the IEEE International Conference on Robotics and Automation, 2015

A Case Study of User-Defined Code Transformations for Data Layout Optimizations.
Proceedings of the Third International Symposium on Computing and Networking, 2015

A Case Study of Memory Optimization for Migration of a Plasmonics Simulation Application to SX-ACE.
Proceedings of the Third International Symposium on Computing and Networking, 2015

Migration of an Atmospheric Simulation Code to an OpenACC Platform Using the Xevolver Framework.
Proceedings of the Third International Symposium on Computing and Networking, 2015

A Verification Framework for Streamlining Empirical Auto-Tuning.
Proceedings of the Third International Symposium on Computing and Networking, 2015

An energy-efficient dynamic memory address mapping mechanism.
Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015

Design of a 3-D stacked floating-point Goldschmidt divider.
Proceedings of the 2015 International 3D Systems Integration Conference, 2015

2014
Analysis, Classification, and Design of Tendon-Driven Mechanisms.
IEEE Trans. Robotics, 2014

MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications.
IEICE Trans. Inf. Syst., 2014

Design and control of a three-fingered tendon-driven robotic hand with active and passive tendons.
Auton. Robots, 2014

Automatic Parameter Tuning of Hierarchical Incremental Checkpointing.
Proceedings of the High Performance Computing for Computational Science - VECPAR 2014 - 11th International Conference, Eugene, OR, USA, June 30, 2014

A Compiler-Assisted OpenMP Migration Method Based on Automatic Parallelizing Information.
Proceedings of the Supercomputing - 29th International Conference, 2014

An Approach to Customization of Compiler Directives for Application-Specific Code Transformations.
Proceedings of the IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs, 2014

Parallel Box: Visually Comparable Representation for Multivariate Data Analysis.
Proceedings of the 18th International Conference on Information Visualisation, 2014

A Platform-Specific Code Smell Alert System for High Performance Computing Applications.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Xevolver: An XML-based code translation framework for supporting HPC application migration.
Proceedings of the 21st International Conference on High Performance Computing, 2014

Design and evaluation of fine-grained power-gating for embedded microprocessors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

An energy optimization method for vector processing mechanisms.
Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

Design and control methodology for fine grain power gating based on energy characterization and code profiling of microprocessors.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

An impact of circuit scale on the performance of 3-D stacked arithmetic units.
Proceedings of the 2014 International 3D Systems Integration Conference, 2014

On-chip checkpointing with 3D-stacked memories.
Proceedings of the 2014 International 3D Systems Integration Conference, 2014

2013
A Capacity-Aware Thread Scheduling Method Combined with Cache Partitioning to Reduce Inter-Thread Cache Conflicts.
IEICE Trans. Inf. Syst., 2013

Colored Mosaic Matrix: Visualization Technique for High-Dimensional Data.
Proceedings of the 17th International Conference on Information Visualisation, 2013

clMPI: An OpenCL Extension for Interoperation with the Message Passing Interface.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Design and evaluation of a media-oriented vector processor with a multi-banked cache memory.
Proceedings of the 11th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2013

A flexible insertion policy for dynamic cache resizing mechanisms.
Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013

Message from the Organizing Committee Chair.
Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013

Design of a 3-D stacked floating-point adder.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

Vertically integrated processor and memory module design for vector supercomputers.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2012
Introduction of Fixed Mode States into Online Reinforcement Learning with Penalties and Rewards and its Application to Biped Robot Waist Trajectory Generation.
J. Adv. Comput. Intell. Intell. Informatics, 2012

Poster: Exploring Design Space of a 3D Stacked Vector Cache - Designing a 3D Stacked Vector Cache using Conventional EDA Tools.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

Abstract: Exploring Design Space of a 3D Stacked Vector Cache.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

Irregular Trend Finder: Visualization tool for analyzing time-series big data.
Proceedings of the 7th IEEE Conference on Visual Analytics Science and Technology, 2012

GPU implementation of phase-based stereo correspondence and its application.
Proceedings of the 19th IEEE International Conference on Image Processing, 2012

A media-oriented vector architectural extension with a high bandwidth cache system.
Proceedings of the 2012 IEEE Symposium on Low-Power and High-Speed Chips, 2012

A capacity-efficient insertion policy for dynamic cache resizing mechanisms.
Proceedings of the Computing Frontiers Conference, CF'12, 2012

An out-of-order vector processing mechanism for multimedia applications.
Proceedings of the Computing Frontiers Conference, CF'12, 2012

Evaluation of the Improved Penalty Avoiding Rational Policy Making Algorithm in Real World Environment.
Proceedings of the Intelligent Information and Database Systems - 4th Asian Conference, 2012

2011
Power-Aware Dynamic Cache Partitioning for CMPs.
Trans. High Perform. Embed. Archit. Compil., 2011

A Self-Organized Overlay Network Management Mechanism for Heterogeneous Environments.
J. Inf. Process., 2011

A Network Clustering Algorithm for Sybil-Attack Resisting.
IEICE Trans. Inf. Syst., 2011

A History-Based Performance Prediction Model with Profile Data Classification for Automatic Task Allocation in Heterogeneous Computing Systems.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2011

CheCL: Transparent Checkpointing and Process Migration of OpenCL Applications.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Introduction of Fixed Mode States into Online Profit Sharing and Its Application to Waist Trajectory Generation of Biped Robot.
Proceedings of the Recent Advances in Reinforcement Learning - 9th European Workshop, 2011

A middle-grain circuit partitioning strategy for 3-D integrated floating-point multipliers.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

Effects of 3-D stacked vector cache on energy consumption.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010
A Fast Ray-Tracing Using Bounding Spheres and Frustum Rays for Dynamic Scene Rendering.
IEICE Trans. Inf. Syst., 2010

Resisting Sybil Attack By Social Network and Network Clustering.
Proceedings of the Tenth Annual International Symposium on Applications and the Internet, 2010

A History-Based Job Scheduling Mechanism for the Vector Computing Cloud.
Proceedings of the Tenth Annual International Symposium on Applications and the Internet, 2010

A voting-based working set assessment scheme for dynamic cache resizing mechanisms.
Proceedings of the 28th International Conference on Computer Design, 2010

A Majority-Based Control Scheme for Way-Adaptable Caches.
Proceedings of the Facing the Multicore-Challenge, 2010

A Load-Forwarding Mechanism for the Vector Architecture in Multimedia Applications.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

A block-parallel signal processing system for CMOS image sensor with three-dimensional structure.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

Cache partitioning strategies for 3-D stacked vector processors.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

Design and early evaluation of a 3-D die stacked chip multi-vector processor.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

Automatic Tuning of CUDA Execution Parameters for Stencil Processing.
Proceedings of the Software Automatic Tuning, From Concepts to State-of-the-Art Results, 2010

2009
Object exploration and manipulation using a robotic finger equipped with an optical three-axis tactile sensor.
Robotica, 2009

A New Improved Penalty Avoiding Rational Policy Making Algorithm for Keepaway with Continuous State Spaces.
J. Adv. Comput. Intell. Intell. Informatics, 2009

A Performance Study of Secure Data Mining on the Cell Processor.
Int. J. Grid High Perform. Comput., 2009

Performance evaluation of NEC SX-9 using real science and engineering applications.
Proceedings of the ACM/IEEE Conference on High Performance Computing, 2009

CheCUDA: A Checkpoint/Restart Tool for CUDA Applications.
Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009

Performance tuning and analysis of future vector processors based on the roofline model.
Proceedings of the 10th workshop on MEmory performance, 2009

Design and control of underactuated tendon-driven mechanisms.
Proceedings of the 2009 IEEE International Conference on Robotics and Automation, 2009

3D on-chip memory for the vector architecture.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

Evaluation of fine grain 3-D integrated arithmetic units.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2008
A Reliability Model for Result Checking in Volunteer Computing.
Proceedings of the 2008 International Symposium on Applications and the Internet, 2008

Consideration of Resource Access History for Optimizing Overlay Networks in P2P-Based Resource Discovery.
Proceedings of the 2008 International Symposium on Applications and the Internet, 2008

A shared cache for a chip multi vector processor.
Proceedings of the 9th workshop on MEmory performance, 2008

Modeling of cache access behavior based on Zipf's law.
Proceedings of the 9th workshop on MEmory performance, 2008

A Utility-Based Double Auction Mechanism for Efficient Grid Resource Allocation.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2008

Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2008

A robotic finger equipped with an optical three-axis tactile sensor.
Proceedings of the 2008 IEEE International Conference on Robotics and Automation, 2008

Implementation and evaluation of a distributed and cooperative load-balancing mechanism for dependable volunteer computing.
Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2008

SPRAT: Runtime processor selection for energy-aware computing.
Proceedings of the 2008 IEEE International Conference on Cluster Computing, 29 September, 2008

First Experiences with NEC SX-9.
Proceedings of the High Performance Computing on Vector Systems 2008, 2008

2007
Partial distortion entropy maximization for online data clustering.
Neural Networks, 2007

A dependable Peer-to-Peer computing platform.
Future Gener. Comput. Syst., 2007

An on-chip cache design for vector processors.
Proceedings of the 2007 workshop on MEmory performance, 2007

A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs.
Proceedings of the 2007 workshop on MEmory performance, 2007

Multi-core data streaming architecture for ray tracing.
Proceedings of the 25th International Conference on Computer Design, 2007

2006
Hierarchical parallel processing of large scale data clustering on a PC cluster with GPU co-processing.
J. Supercomput., 2006

Preparation and Evaluation of Aligned Naphthacene Thin Films Using Surface Plasmon Excitation.
IEICE Trans. Electron., 2006

Evaluating Computational Performance of Backpropagation Learning on Graphics Hardware.
Proceedings of the Irish Conference on the Mathematical Foundations of Computer Science and Information Technology, 2006

A distributed and cooperative load balancing mechanism for large-scale P2P systems.
Proceedings of the 2006 International Symposium on Applications and the Internet Workshops (SAINT 2006 Workshops), 2006

Design and Implementation of an Efficient Search Mechanism Based on the Hybrid P2P Model for Ubiquitous Computing Systems.
Proceedings of the 2006 International Symposium on Applications and the Internet (SAINT 2006), 2006

Sensing Precision of an Optical Three-axis Tactile Sensor for a Robotic Finger.
Proceedings of the 15th IEEE International Symposium on Robot and Human Interactive Communication, 2006

Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications.
Proceedings of the Parallel and Distributed Processing and Applications, 2006

An Efficient Text Capture Method for Moving Robots Using DCT Feature and Text Tracking.
Proceedings of the 18th International Conference on Pattern Recognition (ICPR 2006), 2006

Radiative Heat Transfer Simulation Using Programmable Graphics Hardware.
Proceedings of the 5th Annual IEEE/ACIS International Conference on Computer and Information Science (ICIS 2006) and 1st IEEE/ACIS International Workshop on Component-Based Software Engineering, 2006

2005
Locality analysis to control dynamically way-adaptable caches.
SIGARCH Comput. Archit. News, 2005

A Self-Organizing Overlay Network to Exploit the Locality of Interests for Effective Resource Discovery in P2P Systems.
Proceedings of the 2005 IEEE/IPSJ International Symposium on Applications and the Internet (SAINT 2005), 31 January, 2005

A Workflow Management Mechanism for Peer-to-Peer Computing Platforms.
Proceedings of the Parallel and Distributed Processing and Applications, 2005

Sensing characteristics of an optical three-axis tactile sensor mounted on a multi-fingered robotic hand.
Proceedings of the 2005 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2005

Text Detection in Color Scene Images based on Unsupervised Clustering of Multi-channel Wavelet Features.
Proceedings of the Eighth International Conference on Document Analysis and Recognition (ICDAR 2005), 29 August, 2005

An Incremental Photon-Mapping Algorithm for Fast Walk-Through Animations.
Proceedings of the Eighth IASTED International Conference on Computer Graphics and Imaging, 2005

2004
Efficient parallel processing of competitive learning algorithms.
Parallel Comput., 2004

A Fast Computation Scheme of Partial Distortion Entropy Updating.
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04), 2004

Multi-grain Parallel Processing of Data-Clustering on Programmable Graphics Hardware.
Proceedings of the Parallel and Distributed Processing and Applications, 2004

2003
Adaptive neural network control of tendon-driven mechanisms with elastic tendons.
Autom., 2003

A new impedance control concept for elastic joint robots -a case of a 1 DOF robot with programmable linear passive impedance.
Proceedings of the 2003 IEEE International Conference on Robotics and Automation, 2003

A Comparison Study of Vector Quantization Codebook Design Algorithms based on the Equidistortion Principle.
Proceedings of the 21st IASTED International Multi-Conference on Applied Informatics (AI 2003), 2003

2002
Parallel Algorithm for the Law-of-the-Jungle Learning to the Fast Design of Optimal Codebooks.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2002

2001
3DCGiRAM: An Intelligent Memory Architecture for Photo-Realistic Image Synthesis.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

2000
Developing a practical parallel multi-pass renderer in Java and C++: toward a Grande application in Java.
Proceedings of the ACM 2000 Java Grande Conference, San Francisco, CA, USA, 2000

Reconfigurable synchronized dataflow processor.
Proceedings of ASP-DAC 2000, 2000

1999
Time stamp invalidation of TLB-unified cache and its performance evaluation.
Syst. Comput. Jpn., 1999

A scheduling method for instruction-level parallel processing of vectorand scalar instructions.
Syst. Comput. Jpn., 1999

A self-organizing network system forming memory from nonstationary probability distributions.
Proceedings of the International Joint Conference Neural Networks, 1999

1998
On Tendon-Driven Robotic Mechanisms with Redundant Tendons.
Int. J. Robotics Res., 1998

Automated Design of Wave Pipelined Multiport Register Files.
Proceedings of the ASP-DAC '98, 1998

1997
Decoupled modified-bit cache.
Syst. Comput. Jpn., 1997

Parallel processing of the shear-warp factorization with the binary-swap method on a distributed-memory multiprocessor system.
Proceedings of the IEEE Symposium on Parallel Rendering, 1997

A Cached Frame Buffer System for Object-Space parallel Processing System.
Proceedings of the Computer Graphics International Conference, 1997

1996
A Hierarchical Parallel Processing System for the Multipass-Rendering Method.
Proceedings of IPPS '96, 1996

1994
Software pipelining for Jetpipeline architecture.
Proceedings of the International Symposium on Parallel Architectures, 1994

1993
An Adaptive Network Routing Method by Electrical-Circuit Modeling.
Proceedings of the Proceedings IEEE INFOCOM '93, The Conference on Computer Communications, Twelfth Annual Joint Conference of the IEEE Computer and Communications Societies, Networking: Foundation for the Future, San Francisco, CA, USA, March 28, 1993

Kinematic and Control Issues on a Tendon-Controlled Wrist Mechanism.
Proceedings of the Robotics, Mechatronics and Manufacturing Systems, 1993

1988
Load balancing strategies for a parallel ray-tracing system based on constant subdivision.
Vis. Comput., 1988

1987
Parallel processing of an object space for image synthesis using ray tracing.
Vis. Comput., 1987

Numerical study for increasing high-temperature regions in hyperthermia with ferromagnetic seed implants.
Syst. Comput. Jpn., 1987

1986
Grasping and manipulation of objects by articulated hands.
Proceedings of the 1986 IEEE International Conference on Robotics and Automation, 1986

1984
A Language Processor of an Intelligent Link System.
Proceedings of the IEEE International Conference on Communications: Links for the Future, 1984

1978
Separation of estimation and control for decentralized stochastic control systems.
Autom., 1978


  Loading...