Zeng-Chuan Wu

According to our database, Zeng-Chuan Wu authored at least 6 papers between 2007 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

An Efficient Architecture of Extended Linear Interpolation for Image Processing.

Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw, Zeng-Chuan Wu, Wen-Kai Tsai

J. Inf. Sci. Eng., 2010

2008

An efficient convolution interpolation kernel for digital image scaling.

Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw, Zeng-Chuan Wu

IEICE Electron. Express, 2008

The efficient VLSI design of BI-CUBIC convolution interpolation for digital image processing.

Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw, Zeng-Chuan Wu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A Low-cost VLSI Design of Extended Linear Interpolation for Real Time Digital Image Processing.

Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Zeng-Chuan Wu, Jia-Yi Tu, Chia-Hung Chen

Proceedings of the International Conference on Embedded Software and Systems, 2008

Real-time FPGA architecture of extended linear convolution for digital image scaling.

Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Wen-Kai Tsai, Zeng-Chuan Wu

Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

2007

The VLSI Design of Winscale for Digital Image Scaling.

Chung-Chi Lin, Zeng-Chuan Wu, Wen-Kai Tsai, Ming-Hwa Sheu, Huann-Keng Chiang

Proceedings of the 3rd International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2007), 2007