Zhenhua Zhu

Orcid: 0009-0007-9259-7180

According to our database1, Zhenhua Zhu authored at least 62 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2024
Dynamic Power Balancing Control Method for Energy Storage DC/DC Parallel Supply System With Low-Frequency Pulsed Load.
IEEE Trans. Ind. Electron., June, 2024

TDPP: 2-D Permutation-Based Protection of Memristive Deep Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024

2023
CoGNN: An Algorithm-Hardware Co-Design Approach to Accelerate GNN Inference With Minibatch Sampling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

Gibbon: An Efficient Co-Exploration Framework of NN Model and Processing-In-Memory Architecture.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

Serving Multi-DNN Workloads on FPGAs: A Coordinated Architecture, Scheduling, and Mapping Perspective.
IEEE Trans. Computers, May, 2023

Gaze-aware hand gesture recognition for intelligent construction.
Eng. Appl. Artif. Intell., 2023

EPIM: Efficient Processing-In-Memory Accelerators based on Epitome.
CoRR, 2023

TDPP: Two-Dimensional Permutation-Based Protection of Memristive Deep Neural Networks.
CoRR, 2023

DF-GAS: a Distributed FPGA-as-a-Service Architecture towards Billion-Scale Graph-based Approximate Nearest Neighbor Search.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Realizing Extreme Endurance Through Fault-aware Wear Leveling and Improved Tolerance.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

SRAM-Based Processing-In-Memory Design with Kullback-Leibler Divergence-Based Dynamic Precision Quantization.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

Minimizing Communication Conflicts in Network-On-Chip Based Processing-In-Memory Architecture.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

CLAP: Locality Aware and Parallel Triangle Counting with Content Addressable Memory.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

PIM-HLS: An Automatic Hardware Generation Tool for Heterogeneous Processing-In-Memory-based Neural Network Accelerators.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Processing-In-Hierarchical-Memory Architecture for Billion-Scale Approximate Nearest Neighbor Search.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Memory-Efficient and Real-Time SPAD-based dToF Depth Sensor with Spatial and Statistical Correlation.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Exploring the Potential of Low-Bit Training of Convolutional Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Identifying Facilitators, Barriers, and Potential Solutions of Adopting Exoskeletons and Exosuits in Construction Workplaces.
Sensors, 2022

Critical Review and Road Map of Automated Methods for Earthmoving Equipment Productivity Monitoring.
J. Comput. Civ. Eng., 2022

Application value of the treatment of breast cancer bone metastases with radioactive seed 125I implantation under CT-guidance.
BMC Medical Imaging, 2022

Field-Based Assessment of Joint Motions in Construction Tasks with and Without Exoskeletons in Support of Worker-Exoskeleton Partnership Modeling and Simulation.
Proceedings of the Winter Simulation Conference, 2022

Optimizing Graph-based Approximate Nearest Neighbor Search: Stronger and Smarter.
Proceedings of the 23rd IEEE International Conference on Mobile Data Management, 2022

WESCO: Weight-encoded Reliability and Security Co-design for In-memory Computing Systems.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

DIMMining: pruning-efficient and parallel graph mining on near-memory-computing.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

Exploiting Parallelism with Vertex-Clustering in Processing-In-Memory-based GCN Accelerators.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Gibbon: Efficient Co-Exploration of NN Model and Processing-In-Memory Architecture.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture.
ACM Trans. Design Autom. Electr. Syst., 2021

Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing With Ferroelectric FETs.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Automatic Identification of Idling Reasons in Excavation Operations Based on Excavator-Truck Relationships.
J. Comput. Civ. Eng., 2021

Rerec: In-ReRAM Acceleration with Access-Aware Mapping for Personalized Recommendation.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Reliability-Aware Training and Performance Modeling for Processing-In-Memory Systems.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

MNSIM-TIME: Performance Modeling Framework for Training-In-Memory Architectures.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
Adaptive output regulation for a class of nonlinear systems with guaranteed transient performance.
Trans. Inst. Meas. Control, 2020

Monocular Vision-Based Framework for Biomechanical Analysis or Ergonomic Posture Assessment in Modular Construction.
J. Comput. Civ. Eng., 2020

FTT-NAS: Discovering Fault-Tolerant Neural Architecture.
CoRR, 2020

Efficient 16 Boolean logic and arithmetic based on bipolar oxide memristors.
Sci. China Inf. Sci., 2020

MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Security Enhancement for RRAM Computing System through Obfuscating Crossbar Row Connections.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

An Energy-Efficient Quantized and Regularized Training Framework For Processing-In-Memory Accelerators.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
TIME: A Training-in-Memory Architecture for RRAM-Based Deep Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

HDC-IM: Hyperdimensional Computing In-Memory Architecture based on RRAM.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

A General Logic Synthesis Framework for Memristor-based Logic Design.
Proceedings of the International Conference on Computer-Aided Design, 2019

A Configurable Multi-Precision CNN Computing Framework Based on Single Bit RRAM.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Learning the sparsity for ReRAM: mapping and pruning sparse neural network for ReRAM based accelerator.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
Two-Dimensional Visual Tracking in Construction Scenarios: A Comparative Study.
J. Comput. Civ. Eng., 2018

Framework for Location Data Fusion and Pose Estimation of Excavators Using Stereo Vision.
J. Comput. Civ. Eng., 2018

Computer Vision-Based Model for Moisture Marks Detection and Recognition in Subway Networks.
J. Comput. Civ. Eng., 2018

Mixed size crossbar based RRAM CNN accelerator with overlapped mapping method.
Proceedings of the International Conference on Computer-Aided Design, 2018

Rescuing memristor-based computing with non-linear resistance levels.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Training low bitwidth convolutional neural network on RRAM.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
TIME: A Training-in-memory Architecture for Memristor-based Deep Neural Networks.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
Smart Sensing Technologies and Their Applications in Civil Infrastructures 2016.
J. Sensors, 2016

Visual Tracking of Construction Jobsite Workforce and Equipment with Particle Filtering.
J. Comput. Civ. Eng., 2016

2015
Smart Sensing Technologies and Their Applications in Civil Infrastructures.
J. Sensors, 2015

Line Segment Grouping and Linking: A Key Step Toward Automated Photogrammetry for Non-Contact Site Surveying.
J. Intell. Robotic Syst., 2015

Comparison of Local Visual Feature Detectors and Descriptors for the Registration of 3D Building Scenes.
J. Comput. Civ. Eng., 2015

2013
Machine Vision-Enhanced Postearthquake Inspection.
J. Comput. Civ. Eng., 2013

2011
Visual Pattern Recognition Models for Remote Sensing of Civil Infrastructure.
J. Comput. Civ. Eng., 2011

2010
Concrete Column Recognition in Images and Videos.
J. Comput. Civ. Eng., 2010

2008
Detecting air pockets for architectural concrete quality assessment using visual sensing.
J. Inf. Technol. Constr., 2008

2006
Trajectory-Based Grasp Interaction for Virtual Environments.
Proceedings of the Advances in Computer Graphics, 2006


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