Zhenyu (Peter) Gu

According to our database1, Zhenyu (Peter) Gu authored at least 10 papers between 2005 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2008
Application-Specific MPSoC Reliability Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007
ISAC: Integrated Space-and-Time-Adaptive Chip-Package Thermal Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Unified Incremental Physical-Level and High-Level Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors.
Proceedings of the 44th Design Automation Conference, 2007

Reliable multiprocessor system-on-chip synthesis.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

2006
Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Adaptive chip-package thermal analysis for synthesis and design.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

TAPHS: thermal-aware unified physical-level and high-level synthesis.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Incremental exploration of the combined physical and behavioral design space.
Proceedings of the 42nd Design Automation Conference, 2005


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