Zhenzhou Ji

Orcid: 0000-0001-6686-3819

According to our database1, Zhenzhou Ji authored at least 64 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Multi-stage data synchronization for public blockchain in complex network environment.
Comput. Networks, November, 2023

Architecting the Autocuckoo Filter to Defend Against Cross-Core Cache Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

Toward Explainable Dialogue System Using Two-stage Response Generation.
ACM Trans. Asian Low Resour. Lang. Inf. Process., March, 2023

Faster service with less resource: A resource efficient blockchain framework for edge computing.
Comput. Commun., February, 2023

2022
Secure hybrid replacement policy: Mitigating conflict-based cache side channel attacks.
Microprocess. Microsystems, March, 2022

PoTA: A hybrid consensus protocol to avoid miners' collusion for BaaS platform.
Peer-to-Peer Netw. Appl., 2022

A Two-Level Cache Aware Adaptive Data Replication Mechanism for Shared LLC.
IEICE Trans. Inf. Syst., 2022

A Commonsense Knowledge Enhanced Network with Retrospective Loss for Emotion Recognition in Spoken Dialog.
Proceedings of the IEEE International Conference on Acoustics, 2022

Pre-training Language Models with Deterministic Factual Knowledge.
Proceedings of the 2022 Conference on Empirical Methods in Natural Language Processing, 2022

How Pre-trained Language Models Capture Factual Knowledge? A Causal-Inspired Analysis.
Proceedings of the Findings of the Association for Computational Linguistics: ACL 2022, 2022

2021
A perceptron-based replication scheme for managing the shared last level cache.
Microprocess. Microsystems, September, 2021

Mitigating Cross-Core Cache Attacks via Suspicious Traffic Detection.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Integrating Regular Expressions with Neural Networks via DFA.
CoRR, 2021

DA-GCN: A Dependency-Aware Graph Convolutional Network for Emotion Recognition in Conversations.
Proceedings of the Neural Information Processing - 28th International Conference, 2021

Knowledge-Interactive Network with Sentiment Polarity Intensity-Aware Multi-Task Learning for Emotion Recognition in Conversations.
Proceedings of the Findings of the Association for Computational Linguistics: EMNLP 2021, 2021

HopRetriever: Retrieve Hops over Wikipedia to Answer Complex Questions.
Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021

2020
When QoE meets learning: A distributed traffic-processing framework for elastic resource provisioning in HetNets.
Comput. Networks, 2020

Defending Blockchain Forking Attack by Delaying MTC Confirmation.
IEEE Access, 2020

Capturing and Obscuring Ping-Pong Patterns to Mitigate Continuous Attacks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
A Reuse-Degree Based Locality Classifier for Locality-Aware Data Replication.
IEEE Access, 2019

CacheGuard: a security-enhanced directory architecture against continuous attacks.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2018
Entity disambiguation with memory network.
Neurocomputing, 2018

2017
Entity disambiguation with decomposable neural networks.
WIREs Data Mining Knowl. Discov., 2017

RACMan: Replication-aware cache management for manycore CMPs with private LLCs.
Microprocess. Microsystems, 2017

2016
Anonymous-address-resolution model.
Frontiers Inf. Technol. Electron. Eng., 2016

2015
A Novel Address Resolution Process Based on the Seek Secret Man Protocol.
J. Inf. Hiding Multim. Signal Process., 2015

Improved strategies and adaptive capability allocation algorithm for query result caching.
Int. J. Web Eng. Technol., 2015

Set-Granular Regional Distributed Cooperative Caching.
IEEE Comput. Archit. Lett., 2015

Modeling Mention, Context and Entity with Neural Networks for Entity Disambiguation.
Proceedings of the Twenty-Fourth International Joint Conference on Artificial Intelligence, 2015

2014
Radical-Enhanced Chinese Character Embedding.
CoRR, 2014

Radical-Enhanced Chinese Character Embedding.
Proceedings of the Neural Information Processing - 21st International Conference, 2014

A local alignment of DNA based on parallelized MUMmer algorithm.
Proceedings of the 10th International Conference on Natural Computation, 2014

2013
DP&TB: a coherence filtering protocol for many-core chip multiprocessors.
J. Supercomput., 2013

TFRC-Satellite: A TFRC Variant with a Loss Differentiation Algorithm for Satellite Networks.
IEEE Trans. Aerosp. Electron. Syst., 2013

An efficient deterministic record-replay with separate dependencies.
Comput. Electr. Eng., 2013

A Performance Study of Software Prefetching for Tracing Garbage Collectors.
Proceedings of the Advanced Parallel Processing Technologies, 2013

2012
CCTR: An efficient point-to-point memory race recorder implemented in chunks.
Microprocess. Microsystems, 2012

An Efficient Point-to-Point Deterministic Record-Replay Enhanced with Signatures.
Proceedings of the 13th International Conference on Parallel and Distributed Computing, 2012

A Synchronization Aware Memory Race Recorder.
Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems, 2012

Modeling and Understanding the Round-trip Time in the Fluid Flow Model.
Proceedings of the 2012 International Conference on Connected Vehicles and Expo, 2012

2010
A Comprehensive Scheme for Contention Management in Hardware Transactional Memory.
Proceedings of the Information and Automation - International Symposium, 2010

2009
A Fuzzy Logic Based Congestion Control Algorithm Suitable for IP-Based Broadband Satellite Networks.
Proceedings of the Sixth International Conference on Fuzzy Systems and Knowledge Discovery, 2009

Research on Evaluation of Parallelization on an Embedded Multicore Platform.
Proceedings of the Advanced Parallel Processing Technologies, 8th International Symposium, 2009

2008
Analyzing BitTorrent Traffic Across Large Network.
Proceedings of the International Conference on Cyberworlds 2008, 2008

2007
Design and performance evaluation of a multi-agent-based dynamic lifetime security scheme for AODV routing protocol.
J. Netw. Comput. Appl., 2007

Using network processor to establish security agent for AODV routing protocol.
J. Comput. Inf. Technol., 2007

2006
Boosting SMT trace processors performance with data cache misssensitive thread scheduling mechanism.
Microprocess. Microsystems, 2006

Simultaneous multithreading trace processors: Improving trace processors performance.
Microprocess. Microsystems, 2006

A High Efficient Architecture for Motion Estimation Based on AVC/AVS Coding Standard.
J. Comput. Res. Dev., 2006

2005
An efficient hardware implementation for motion estimation of AVC standard.
IEEE Trans. Consumer Electron., 2005

Path-based next N trace prefetch in trace processors.
Microprocess. Microsystems, 2005

Stateful Inspection Firewall Session Table Processing.
Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005

An Image Sensor Node for Wireless Sensor Networks.
Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005

A Fast and Scalable Conflict Detection Algorithm for Packet Classifiers.
Proceedings of the Parallel and Distributed Processing and Applications, 2005

Session Table Architecture for Defending SYN Flood Attack.
Proceedings of the Information and Communications Security, 7th International Conference, 2005

Energy Efficient United L2 Cache Design with Instruction/Data Filter Scheme.
Proceedings of the Advanced Parallel Processing Technologies, 6th International Workshop, 2005

2004
An Efficient VLSI Architecture of the Sample Interpolation for MPEG-4 Advanced Simple Profile.
Proceedings of the Advances in Multimedia Information Processing - PCM 2004, 5th Pacific Rim Conference on Multimedia, Tokyo, Japan, November 30, 2004

An Efficient VLSI Implementation for MC Interpolation of AVS Standard.
Proceedings of the Advances in Multimedia Information Processing - PCM 2004, 5th Pacific Rim Conference on Multimedia, Tokyo, Japan, November 30, 2004

An Efficient VLSI Implementation of MC Interpolation for MPEG-4.
Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

A novel distributed intrusion detection model based on mobile agent.
Proceedings of the 3rd International Conference on Information Security, 2004

An Efficient VLSI Architecture for MC Interpolation in AVC Video Coding.
Proceedings of the International Conference on Embedded Systems and Applications, 2004

2003
Simultaneous Multithreading Trace Processors.
Proceedings of the Advanced Parallel Programming Technologies, 5th International Workshop, 2003

Orthogonal Design Method for Optimal Cache Configuration.
Proceedings of the Advanced Parallel Programming Technologies, 5th International Workshop, 2003

A VLSI Architecture Design of 1-D DWT.
Proceedings of the Advanced Parallel Programming Technologies, 5th International Workshop, 2003


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