Zhizhong Tang

According to our database1, Zhizhong Tang authored at least 26 papers between 1990 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2016
NestedMP: Enabling cache-aware thread mapping for nested parallel shared memory applications.
Parallel Comput., 2016

2014
OpenMDSP: Extending OpenMP to Program Multi-Core DSPs.
J. Comput. Sci. Technol., 2014

NestedMP: Taming Complex Configuration Space of Degree of Parallelism for Nested-Parallel Programs.
Proceedings of the 43rd International Conference on Parallel Processing Workshops, 2014

2012
Energy Consumption Optimized Scheduling Algorithm for Clustered VLIW Architectures.
J. Low Power Electron., 2012

2011
OpenMDSP: Extending OpenMP to Program Multi-Core DSP.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010
A Novel Memory Subsystem Evaluation Framework for Chip Multiprocessors.
Proceedings of the 12th IEEE International Conference on High Performance Computing and Communications, 2010

2009
A parameterized multilevel pattern matching architecture on FPGAs for network intrusion detection and prevention.
Sci. China Ser. F Inf. Sci., 2009

Understanding the Memory Behavior of Emerging Multi-core Workloads.
Proceedings of the Eighth International Symposium on Parallel and Distributed Computing, 2009

Efficient shared cache management through sharing-aware replacement and streaming-aware insertion policy.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

2008
Data Sharing Analysis of Emerging Parallel Media Mining Workloads.
Proceedings of the High Performance Computing, 2008

2007
Single-dimension software pipelining for multidimensional loops.
ACM Trans. Archit. Code Optim., 2007

Multilevel Pattern Matching Architecture for Network Intrusion Detection and Prevention System.
Proceedings of the Embedded Software and Systems, [Third] International Conference, 2007

2005
Coping with Data Dependencies of Multi-dimensional Array References.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2005

A Dynamic Data Dependence Analysis Approach for Software Pipelining.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2005

A Static Data Dependence Analysis Approach for Software Pipelining.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2005

Service Roaming Based Distributed Environment for Mobile Computing.
Proceedings of the 2005 International Conference on Pervasive Systems and Computing, 2005

2004
Increasing Software-Pipelined Loops in the Itanium-Like Architecture.
Proceedings of the Parallel and Distributed Processing and Applications, 2004

Single-Dimension Software Pipelining for Multi-Dimensional Loops.
Proceedings of the 2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 2004

2003
Overcoming Static Register Pressure for Software Pipelining in the Itanium Architecture.
Proceedings of the Advanced Parallel Programming Technologies, 5th International Workshop, 2003

1997
An Improvement on Data Dependence Analysis Supporting Software Pipelining Technique.
Proceedings of the 1997 Advances in Parallel and Distributed Computing Conference (APDC '97), 1997

Control Mechanism for Software Pipelining on Nested Loop.
Proceedings of the 1997 Advances in Parallel and Distributed Computing Conference (APDC '97), 1997

A New Architecture For Branch-Intensive Loops.
Proceedings of the 1997 Advances in Parallel and Distributed Computing Conference (APDC '97), 1997

1993
URPR-1: A single-chip VLIW architecture.
Microprocess. Microprogramming, 1993

GPMB - software pipelining branch-intensive loops.
Proceedings of the 26th Annual International Symposium on Microarchitecture, 1993

1992
A VLIW architecture for optimal execution of branch-intensive loops.
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992

1990
A software pipelining based VLIW architecture and optimizing compiler.
Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990


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