Hongbo Rong

Orcid: 0000-0002-3275-7791

According to our database1, Hongbo Rong authored at least 32 papers between 2004 and 2024.

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Bibliography

2024
UniSparse: An Intermediate Language for General Sparse Format Customization.
CoRR, 2024

POPA: Expressing High and Portable Performance across Spatial and Vector Architectures for Tensor Computations.
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

2023
Leveraging Hardware Probes and Optimizations for Accelerating Fuzz Testing of Heterogeneous Applications.
Proceedings of the 31st ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering, 2023

Lasa: Abstraction and Specialization for Productive and Performant Linear Algebra on FPGAs.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022
Introduction to Special Issue on FPGAs in Data Centers, Part II.
ACM Trans. Reconfigurable Technol. Syst., 2022

Introduction to Special Issue on FPGAs in Data Centers.
ACM Trans. Reconfigurable Technol. Syst., 2022

Embedding a DSL in SYCL for Productive and Performant Tensor Computing on Heterogeneous Devices.
Proceedings of the IWOCL'22: International Workshop on OpenCL, Bristol, United Kingdom, May 10, 2022

2021
Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects.
ACM Trans. Reconfigurable Technol. Syst., 2021

2020
Mapping Stencils on Coarse-grained Reconfigurable Spatial Architecture.
CoRR, 2020

Systolic Computing on GPUs for Productive Performance.
CoRR, 2020

Building Application-Specific Overlays on FPGAs with High-Level Customizable IPs.
CoRR, 2020

SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Tensaurus: A Versatile Accelerator for Mixed Sparse-Dense Tensor Computations.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2019
T2S-Tensor: Productively Generating High-Performance Spatial Hardware for Dense Tensor Computations.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
Expressing Sparse Matrix Computations for Productive Performance on Spatial Architectures.
CoRR, 2018

Productively Expressing High-performance Spatial Designs of Givens Rotation-based QR Decomposition Algorithm.
CoRR, 2018

2017
Programmatic Control of a Compiler for Generating High-performance Spatial Hardware.
CoRR, 2017

Mozart : Efficient Composition of Library Functions for Heterogeneous Execution.
Proceedings of the Languages and Compilers for Parallel Computing, 2017

2016
Automating wavefront parallelization for sparse matrix computations.
Proceedings of the International Conference for High Performance Computing, 2016

Sparso: Context-driven Optimizations of Sparse Linear Algebra.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015
ProductiveC: enabling high productivity in C-family languages.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014
Just-In-Time Software Pipelining.
Proceedings of the 12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014

2013
Allocating rotating registers by scheduling.
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

2012
SMARQ: Software-Managed Alias Register Queue for Dynamic Optimizations.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

2009
Tree register allocation.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

2008
Register allocation for software pipelined multidimensional loops.
ACM Trans. Program. Lang. Syst., 2008

2007
Single-dimension software pipelining for multidimensional loops.
ACM Trans. Archit. Code Optim., 2007

Advances in Software Pipelining.
Proceedings of the Compiler Design Handbook: Optimizations and Machine Code Generation, 2007

2006
Multi-dimensional Kernel Generation for Loop Nest Software Pipelining.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006

2005
Register allocation for software pipelined multi-dimensional loops.
Proceedings of the ACM SIGPLAN 2005 Conference on Programming Language Design and Implementation, 2005

2004
Single-Dimension Software Pipelining for Multi-Dimensional Loops.
Proceedings of the 2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 2004

Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops.
Proceedings of the 2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 2004


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