Bogong Su

According to our database1, Bogong Su authored at least 31 papers between 1982 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Comparing DSP Software Performance Prediction Models at Source Code Level - From Analytical to Statistical.
JSW, 2019

2017
Software performance prediction at source level.
Proceedings of the 15th IEEE International Conference on Software Engineering Research, 2017

2006
New DSP Benchmark based on Selectable Mode Vocoder (SMV).
Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, 2006

2004
Software De-Pipelining Technique.
Proceedings of the 4th IEEE International Workshop on Source Code Analysis and Manipulation (SCAM 2004), 2004

Loop optimization with tradeoff between cycle count and code size for DSP applications.
Proceedings of the 2004 12th European Signal Processing Conference, 2004

2003
De-pipeline a software-pipelined loop.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

2000
A scalable loop optimization approach for scalable DSP processors.
Proceedings of the IEEE International Conference on Acoustics, 2000

1999
Source-level loop optimization for DSP code generation.
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

1998
Building a Retargetable Local Instruction Scheduler.
Softw., Pract. Exper., 1998

Software pipelining of nested loops for real-time DSP applications.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

1994
Using timed Petri net to model instruction-level loop scheduling with resource constraints.
J. Comput. Sci. Technol., 1994

Decomposed software pipelining: A new perspective and a new approach.
International Journal of Parallel Programming, 1994

A study of pointer aliasing for software pipelining using run-time disambiguation.
Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30, 1994

1993
URPR-1: A single-chip VLIW architecture.
Microprocessing and Microprogramming, 1993

GPMB - software pipelining branch-intensive loops.
Proceedings of the 26th Annual International Symposium on Microarchitecture, 1993

1992
Foresighted Instruction Scheduling Under Timing Constraints.
IEEE Trans. Computers, 1992

A VLIW architecture for optimal execution of branch-intensive loops.
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992

1991
GURPR*: A New Global Software Pipelining Algorithm.
Proceedings of the 24th Annual IEEE/ACM International Symposium on Microarchitecture, 1991

Decomposition and allocation of flat-structured problems.
Proceedings of the Fifteenth Annual International Computer Software and Applications Conference, 1991

1990
A software pipelining based VLIW architecture and optimizing compiler.
Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990

Distributed Problem Solving System for Transport Dispatching.
Proceedings of the Third International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems, IEA/AIE 1990, July 15-18, 1990, The Mills House Hotel, Charleston, SC, USA, 1990

1988
Global microcode compaction under timing constraints.
Proceedings of the 21st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1988, San Diego, California, USA, November 28, 1988

The Architecture of a Distributed Knowledge Base System.
Proceedings of the IFIP TC2/TC8/WG 2.6/WG 8.1 Working Conference on the Role of Artificial Intelligence in Databases and Information Systems, 1988

1987
GURPR - a method for global software pipelining.
Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987

Microcode compaction with timing constraints.
Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987

1986
URPR - An extension of URCR for software pipelining.
Proceedings of the 19th annual workshop on Microprogramming, 1986

A case study in signal processing microprogramming using the URPR software pipelining technique.
Proceedings of the 19th annual workshop on Microprogramming, 1986

1985
Some experiments in global microcode compaction.
Proceedings of the 18th annual workshop on Microprogramming, 1985

1984
An improvement of trace scheduling for global microcode compaction.
Proceedings of the 17th annual workshop on Microprogramming, 1984

1983
A Preliminary Evaluatin of Trace Scheduling for Global Microcode Compaction.
IEEE Trans. Computers, 1983

1982
Emulating an MIMD architecture.
Proceedings of the 15th annual workshop on Microprogramming, 1982


  Loading...