Abdessatar Abderrahman

According to our database, Abdessatar Abderrahman authored at least 5 papers between 1994 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

New Analog Test Metrics Based on Probabilistic and Deterministic Combination Approaches.

Abdessatar Abderrahman, Mohamad Sawan, Yvon Savaria, Abdelhakim Khouas

Proceedings of the 14th IEEE International Conference on Electronics, 2007

1999

Worst case tolerance analysis and CLP-based multifrequency test generation for analog circuits.

Abdessatar Abderrahman, Eduard Cerny, Bozena Kaminska

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

1997

CLP-based Multifrequency Test Generation for Analog Circuits.

Abdessatar Abderrahman, Eduard Cerny, Bozena Kaminska

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

1996

Optimization-based multifrequency test generation for analog circuits.

Abdessatar Abderrahman, Bozena Kaminska, Eduard Cerny

J. Electron. Test., 1996

1994

Estimation of Simultaneous Switching Power and Ground Noise of Static CMOS Combinational Circuits.

Abdessatar Abderrahman, Bozena Kaminska, Yvon Savaria

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994