Abdullah Sahruri

According to our database, Abdullah Sahruri authored at least 6 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

Late Breaking Results - High-Throughput Metastability Characterization of Arbiters using HDC-based BIST.

Abdullah Sahruri, Martin Margala

Proceedings of the 44th IEEE VLSI Test Symposium, 2026

RouteHD: A Routing-Aware FPGA Accelerator for HDC Classification.

Abdullah Sahruri, Alaaddin Goktug Ayar, Sercan Aygun, Martin Margala

Proceedings of the 27th International Symposium on Quality Electronic Design, 2026

TLG2LUT6: Threshold Logic Mapping for Sub-Nanosecond Binary Neural Network Inference.

Abdullah Sahruri, Martin Margala

Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

2025

TLGLock: A New Approach in Logic Locking Using Key-Driven Charge Recycling in Threshold Logic Gates.

Abdullah Sahruri, Martin Margala

Proceedings of the 33rd IFIP/IEEE International Conference on Very Large Scale Integration, 2025

2024

Detecting Vulnerability in Hardware Description Languages: Opcode Language Processing.

Alaaddin Goktug Ayar, Abdullah Sahruri, Sercan Aygun, Mehran Shoushtari Moghadam, M. Hassan Najafi, Martin Margala

IEEE Embed. Syst. Lett., June, 2024

HiCTL: High Fan-in Differential Capacitive-Threshold-Logic Gate Implementation With an Offset-Compensated Comparator.

Abdullah Sahruri, Martin Margala, Ugur Çilingiroglu

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024