Ugur Çilingiroglu

Orcid: 0000-0003-2989-2041

According to our database1, Ugur Çilingiroglu authored at least 21 papers between 1978 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2014
On-Chip Photovoltaic Energy Conversion in Bulk-CMOS for Indoor Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Nanowatt-Scale Power Management for On-Chip Photovoltaic Energy Harvesting Beacons.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014

2013
A Zero-Voltage Switching Technique for Minimizing the Current-Source Power of Implanted Stimulators.
IEEE Trans. Biomed. Circuits Syst., 2013

2010
Power minimization methodology for VCTL topologies.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

2009
Varicap threshold logic.
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

2007
Magnetic In-circuit Testing of Multiple Power and Ground Pins for Open Faults.
J. Electron. Test., 2007

2003
An optimally self-biased threshold-voltage extractor [MOSFET circuit parametric testing].
IEEE Trans. Instrum. Meas., 2003

An evaluation of MOS interface-trap charge pump as an ultralow constant-current generator.
IEEE J. Solid State Circuits, 2003

Compact sub-hertz OTA-C filter design with interface-trap charge pump.
IEEE J. Solid State Circuits, 2003

2002
Rank-order filter design with a sampled-analog multiple-winners-take-all core.
IEEE J. Solid State Circuits, 2002

2001
An optimally self-biased threshold-voltage extractor.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

A sampled-analog rank-order-filter architecture.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000
An accurate self-bias threshold voltage extractor using differential difference feedback amplifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1997
Sampled-analog implementation of application-specific fuzzy controllers.
IEEE Trans. Fuzzy Syst., 1997

Improving the resolution of Lazzaro winner-take-all circuit.
Proceedings of International Conference on Neural Networks (ICNN'97), 1997

1996
A capacitive threshold-logic gate.
IEEE J. Solid State Circuits, 1996

A compact high-speed (31, 5) parallel counter circuit based on capacitive threshold-logic gates.
IEEE J. Solid State Circuits, 1996

1995
A high resolution CMOS winner-take-all circuit.
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995

1993
A high-density and low-power charge-based Hamming network.
IEEE Trans. Very Large Scale Integr. Syst., 1993

A charge-based on-chip adaptation Kohonen neural network.
IEEE Trans. Neural Networks, 1993

1978
A Hybrid Static Random-Access-Memory Cell.
PhD thesis, 1978


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