Adarsh Patil

Orcid: 0000-0001-9533-6997

Affiliations:

Arm, Cambridge, UK
University of Edinburgh, UK (former)
Indian Institute of Sciences, Bangalore, India (former)

According to our database¹, Adarsh Patil authored at least 7 papers between 2017 and 2026.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

Book In proceedings Article PhD thesis Dataset Other

Bibliography

2026

Efficient Remote Memory Ordering for Non-Coherent Systems.

[BibT_eX]

[DOI]

Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2026

2025

Improving Compiler Support for SIMD Offload Using Arm Streaming SVE.

[BibT_eX]

[DOI]

Mohamed Husain Noor Mohamed

Adarsh Patil

Latchesar Ionkov

Eric Van Hensbergen

Proceedings of the High Performance Computing, 2025

2024

UDON: A case for offloading to general purpose compute on CXL memory.

[BibT_eX]

[DOI]

CoRR, 2024

2023

Āpta: Fault-tolerant object-granular CXL disaggregated memory for accelerating FaaS.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Network, 2023

2021

Dvé: Improving DRAM Reliability and Performance On-Demand via Coherent Replication.

[BibT_eX]

[DOI]

Adarsh Patil

Vijay Nagarajan

Rajeev Balasubramonian

Nicolai Oswald

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020

TLB and Pagewalk Performance in Multicore Architectures with Large Die-Stacked DRAM Cache.

[BibT_eX]

[DOI]

Adarsh Patil

CoRR, 2020

2017

HAShCache: Heterogeneity-Aware Shared DRAMCache for Integrated Heterogeneous Systems.

[BibT_eX]

[DOI]

Adarsh Patil

Ramaswamy Govindarajan

ACM Trans. Archit. Code Optim., 2017

Adarsh Patil

Timeline

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Bibliography

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