Nikos Nikoleris

Orcid: 0000-0001-5811-3110

According to our database1, Nikos Nikoleris authored at least 20 papers between 2011 and 2023.

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Bibliography

2023
Pragmatic Memory-System Support for Intermittent Computing Using Emerging Nonvolatile Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Āpta: Fault-tolerant object-granular CXL disaggregated memory for accelerating FaaS.
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Network, 2023

2021
Branch Predicting with Sparse Distributed Memories.
CoRR, 2021

Synthesizing Formal Models of Hardware from RTL for Efficient Verification of Memory Model Implementations.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Execution Dependence Extension (EDE): ISA Support for Eliminating Fences.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020
The gem5 Simulator: Version 20.0+.
CoRR, 2020

Fused: Closed-Loop Performance and Energy Simulation of Embedded Systems.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020

2019
Directed Statistical Warming through Time Traveling.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

BRB: Mitigating Branch Predictor Side-Channels.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

Efficient State Retention through Paged Memory Management for Reactive Transient Computing.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2017
Addressing Energy Challenges in Filter Caches.
Proceedings of the 29th International Symposium on Computer Architecture and High Performance Computing, 2017

2016
CoolSim: Statistical techniques to replace cache warming with efficient, virtualized profiling.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

CoolSim: Eliminating traditional cache warming with fast, virtualized profiling.
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

2015
Full Speed Ahead: Detailed Architectural Simulation at Near-Native Speed.
Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015

2014
Extending statistical cache models to support detailed pipeline simulators.
Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014

A software based profiling method for obtaining speedup stacks on commodity multi-cores.
Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014

2012
Bandwidth bandit: Understanding memory contention.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2012

Bandwidth bandit: quantitative characterization of memory contention.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011
Cache Pirating: Measuring the Curse of the Shared Cache.
Proceedings of the International Conference on Parallel Processing, 2011

A Smart HPC Interconnect for Clusters of Virtual Machines.
Proceedings of the Euro-Par 2011: Parallel Processing Workshops - CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS, MDGS, ProPer, Resilience, UCHPC, VHPC, Bordeaux, France, August 29, 2011


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