Aditya Anshul

According to our database, Aditya Anshul authored at least 15 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Watermarking Hardware IPs Using Design Parameter Driven Encrypted Dispersion Matrix With Eigen Decomposition Based Security Framework.

Anirban Sengupta, Aditya Anshul

IEEE Access, 2024

2023

PSO based exploration of multi-phase encryption based secured image processing filter hardware IP core datapath during high level synthesis.

Aditya Anshul, Anirban Sengupta

Expert Syst. Appl., August, 2023

Robust Security of Hardware Accelerators Using Protein Molecular Biometric Signature and Facial Biometric Encryption Key.

Anirban Sengupta, Rahul Chaurasia, Aditya Anshul

IEEE Trans. Very Large Scale Integr. Syst., June, 2023

Quadruple phase watermarking during high level synthesis for securing reusable hardware intellectual property cores.

Mahendra Rathor, Aditya Anshul, K. Bharath, Rahul Chaurasia, Anirban Sengupta

Comput. Electr. Eng., January, 2023

Exploring Handwritten Signature Image Features for Hardware Security.

Mahendra Rathor, Anirban Sengupta, Rahul Chaurasia, Aditya Anshul

IEEE Trans. Dependable Secur. Comput., 2023

Exploration of optimal functional Trojan-resistant hardware intellectual property (IP) core designs during high level synthesis.

Anirban Sengupta, Aditya Anshul, Rahul Chaurasia

Microprocess. Microsystems, 2023

Exploration of optimal crypto-chain signature embedded secure JPEG-CODEC hardware IP during high level synthesis.

Aditya Anshul, Anirban Sengupta

Microprocess. Microsystems, 2023

Key-Driven Multi-Layered Structural Obfuscation of IP cores using Reconfigurable Obfuscator based Network Challenge and Switch Control Logic.

Anirban Sengupta, Aditya Anshul

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

Low-Cost Hardware Security of Laplace Edge Detection and Embossment Filter Using HLS Based Encryption and PSO.

Aditya Anshul, Anirban Sengupta

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

Fusing IP vendor Palmprint Biometric with Encoded Hash for Hardware IP Core Protection of Image Processing Filters.

Anirban Sengupta, Aditya Anshul, Sumer Thakur, Chirag Kothari

Proceedings of the International Conference on Microelectronics, 2023

Secured and Optimized Hardware Accelerators using Key-Controlled Encoded Hash Slices and Firefly Algorithm based Exploration.

Anirban Sengupta, Aditya Anshul, Chirag Kothari, Sumer Thakur

Proceedings of the International Conference on Microelectronics, 2023

Hardware Security of Digital Image Filter IP Cores against Piracy using IP Seller's Fingerprint Encrypted Amino Acid Biometric Sample.

Anirban Sengupta, Rahul Chaurasia, Aditya Anshul

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2023

2022

Palmprint Biometric Versus Encrypted Hash Based Digital Signature for Securing DSP Cores Used in CE Systems.

Rahul Chaurasia, Aditya Anshul, Anirban Sengupta, Shikha Gupta

IEEE Consumer Electron. Mag., 2022

IP Core Protection of Image Processing Filters with Multi-Level Encryption and Covert Steganographic Security Constraints.

Aditya Anshul, Anirban Sengupta

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Designing Low Cost Secured DSP Core using Steganography and PSO for CE systems.

Aditya Anshul, K. Bharath, Anirban Sengupta

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022