Rahul Chaurasia

According to our database, Rahul Chaurasia authored at least 19 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Multi-cut based architectural obfuscation and handprint biometric signature for securing transient fault detectable IP cores during HLS.

Rahul Chaurasia, Anirban Sengupta

Integr., March, 2024

2023

Exploring unified biometrics with encoded dictionary for hardware security of fault secured IP core designs.

Anirban Sengupta, Rahul Chaurasia, K. Bharath

Comput. Electr. Eng., October, 2023

Retinal Biometric for Securing JPEG-Codec Hardware IP Core for CE Systems.

Rahul Chaurasia, Anirban Sengupta

IEEE Trans. Consumer Electron., August, 2023

Robust Security of Hardware Accelerators Using Protein Molecular Biometric Signature and Facial Biometric Encryption Key.

Anirban Sengupta, Rahul Chaurasia, Aditya Anshul

IEEE Trans. Very Large Scale Integr. Syst., June, 2023

Quadruple phase watermarking during high level synthesis for securing reusable hardware intellectual property cores.

Mahendra Rathor, Aditya Anshul, K. Bharath, Rahul Chaurasia, Anirban Sengupta

Comput. Electr. Eng., January, 2023

Exploring Handwritten Signature Image Features for Hardware Security.

Mahendra Rathor, Anirban Sengupta, Rahul Chaurasia, Aditya Anshul

IEEE Trans. Dependable Secur. Comput., 2023

Exploration of optimal functional Trojan-resistant hardware intellectual property (IP) core designs during high level synthesis.

Anirban Sengupta, Aditya Anshul, Rahul Chaurasia

Microprocess. Microsystems, 2023

Biometrics for Hardware Security and Trust: Discussion and Analysis.

Anirban Sengupta, Mahendra Rathor, Rahul Chaurasia

IT Prof., 2023

Securing Fault-Detectable CNN Hardware Accelerator Against False Claim of IP Ownership Using Embedded Fingerprint as Countermeasure.

Anirban Sengupta, Rahul Chaurasia

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

Designing Optimized and Secured Reusable Convolutional Hardware Accelerator Against IP Piracy Using Retina Biometrics.

Rahul Chaurasia, Anirban Sengupta

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

Fault Secured JPEG-Codec Hardware Accelerator with Piracy Detective Control using Secure Fingerprint Template.

Rahul Chaurasia, Abhinav Reddy Asireddy, Anirban Sengupta

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

Hardware Security of Digital Image Filter IP Cores against Piracy using IP Seller's Fingerprint Encrypted Amino Acid Biometric Sample.

Anirban Sengupta, Rahul Chaurasia, Aditya Anshul

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2023

2022

Secured Convolutional Layer IP Core in Convolutional Neural Network Using Facial Biometric.

Anirban Sengupta, Rahul Chaurasia

IEEE Trans. Consumer Electron., 2022

Palmprint Biometric Versus Encrypted Hash Based Digital Signature for Securing DSP Cores Used in CE Systems.

Rahul Chaurasia, Aditya Anshul, Anirban Sengupta, Shikha Gupta

IEEE Consumer Electron. Mag., 2022

Securing IP Cores for DSP Applications Using Structural Obfuscation and Chromosomal DNA Impression.

Anirban Sengupta, Rahul Chaurasia

IEEE Access, 2022

Security Vs Design Cost of Signature Driven Security Methodologies for Reusable Hardware IP Core.

Rahul Chaurasia, Anirban Sengupta

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Symmetrical Protection of Ownership Right's for IP Buyer and IP Vendor using Facial Biometric Pairing.

Rahul Chaurasia, Anirban Sengupta

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2021

Contact-Less Palmprint Biometric for Securing DSP Coprocessors Used in CE Systems.

Anirban Sengupta, Rahul Chaurasia, Tarun Reddy

IEEE Trans. Consumer Electron., 2021

Securing Reusable Hardware IP cores using Palmprint Biometric.

Rahul Chaurasia, Anirban Sengupta

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021