Adronis Niyonkuru

According to our database1, Adronis Niyonkuru authored at least 6 papers between 2002 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2005
Zum Einsatz von rekonfigurierbarer Hardware in Prozessorarchitekturen.
PhD thesis, 2005

Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs.
Proceedings of the 18th International Conference on Architecture of Computing Systems, 2005

2004
Designing a Runtime Reconfigurable Processor for General Purpose Applications.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Partial and Dynamically Reconfiguration of Xilinx Virtex-II FPGAs.
Proceedings of the Field Programmable Logic and Application, 2004

Evaluation of Run-Time Reconfiguration for General-Purpose Computing.
Proceedings of the ARCS 2004, 2004

2002
A Reconfigurable Processor Architecture.
Proceedings of the Field-Programmable Logic and Applications, 2002


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