Mateusz Majer

According to our database, Mateusz Majer authored at least 24 papers between 2004 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

The Erlangen Slot Machine - An FPGA-Based Partially Reconfigurable Computer.

Mateusz Majer

PhD thesis, 2011

2010

Erlangen Slot Machine: An FPGA-Based Dynamically Reconfigurable Computing Platform.

Josef Angermeier, Christophe Bobda, Mateusz Majer, Jürgen Teich

Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010

ReCoNodes - Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices.

Ali Ahmadinia, Josef Angermeier, Sándor P. Fekete, Tom Kamphans, Dirk Koch, Mateusz Majer, Nils Schweer, Jürgen Teich, Christopher Tessars, Jan van der Veen

Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010

2008

Offline and Online Aspects of Defragmenting the Module Layout of a Partially Reconfigurable Device.

Sándor P. Fekete, Jan van der Veen, Ali Ahmadinia, Diana Göhringer, Mateusz Majer, Jürgen Teich

IEEE Trans. Very Large Scale Integr. Syst., 2008

Co-design Architecture and Implementation for Point-Based Rendering on FPGAs.

Mateusz Majer, Stefan Wildermann, Josef Angermeier, Stefan Hanke, Jürgen Teich

Proceedings of the 19th IEEE/IFIP International Symposium on Rapid System Prototyping: RSP 2009, 2008

Fine grain reconfigurable architectures.

Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker

Proceedings of the FPL 2008, 2008

Reconfigurable HW/SW Architecture of a Real-Time Driver Assistance System.

Josef Angermeier, Ulrich Batzer, Mateusz Majer, Jürgen Teich, Christopher Claus, Walter Stechele

Proceedings of the Reconfigurable Computing: Architectures, 2008

2007

The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer.

Mateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda

J. VLSI Signal Process., 2007

The Erlangen Slot Machine - A Platform for Interdisciplinary Research in Dynamically Reconfigurable Computing (ESM - Eine Hardware-Plattform für interdisziplinäre Forschung im Bereich des dynamischen rekonfigurierbaren Rechnens).

Josef Angermeier, Diana Göhringer, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen

it Inf. Technol., 2007

2006

An FPGA-Based Dynamically Reconfigurable Platform: From Concept to Realization.

Mateusz Majer

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Minimizing Communication Cost for Reconfigurable Slot Modules.

Sándor P. Fekete, Jan van der Veen, Mateusz Majer, Jürgen Teich

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine.

Diana Göhringer, Mateusz Majer, Jürgen Teich

Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006

A Flexible Reconfiguration Manager for the Erlangen Slot Machine.

Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Jürgen Teich

Proceedings of the ARCS 2006, 2006

2005

A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices.

Ali Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen

Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

Packet Routing in Dynamically Changing Networks on Chip.

Mateusz Majer, Christophe Bobda, Ali Ahmadinia, Jürgen Teich

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

The Erlangen Slot Machine: Increasing Flexibility in FPGA-Based Reconfigurable Platforms.

Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich

Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices.

Christophe Bobda, Ali Ahmadinia, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

The Erlangen Slot Machine: A Highly Flexible FPGA-Based Reconfigurable Platform.

Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich, Sándor P. Fekete, Jan van der Veen

Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

Defragmenting the Module Layout of a Partially Reconfigurable Device.

Jan van der Veen, Sándor P. Fekete, Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Frank Hannig, Jürgen Teich

Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs.

Christophe Bobda, Ali Ahmadinia, Kurapati Rajesham, Mateusz Majer, Adronis Niyonkuru

Proceedings of the 18th International Conference on Architecture of Computing Systems, 2005

2004

Task scheduling for heterogeneous reconfigurable computers.

Ali Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich

Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

Flexible Overhead Processing Architectures for G.709 Optical Transport Networks.

Tudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004

A Dynamic NoC Approach for Communication in Reconfigurable Devices.

Christophe Bobda, Mateusz Majer, Dirk Koch, Ali Ahmadinia, Jürgen Teich

Proceedings of the Field Programmable Logic and Application, 2004

Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing.

Tudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel, Jörg Pleickhardt, Bernd Bleisteiner

Proceedings of the First Conference on Computing Frontiers, 2004