Ahish Shylendra

Orcid: 0000-0003-2388-0453

According to our database1, Ahish Shylendra authored at least 14 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Unifying Intrinsically-Operated Physically Unclonable Function and Random Number Generation in Analog Circuits: A Case Study on Successive Approximation ADC.
Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

2022
ENOS: Energy-Aware Network Operator Search in Deep Neural Networks.
IEEE Access, 2022

Non van-Neumann Anomaly Detection in Multi-Channel Time-Series using Charge Trap Transistor Crossbars.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Analog-Domain Time-Series Moment Extraction for Low Power Predictive Maintenance Analytics.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021
ENOS: Energy-Aware Network Operator Search for Hybrid Digital and Compute-in-Memory DNN Accelerators.
CoRR, 2021

2020
Low Power Unsupervised Anomaly Detection by Nonparametric Modeling of Sensor Statistics.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Low Power Unsupervised Anomaly Detection by Non-Parametric Modeling of Sensor Statistics.
CoRR, 2020

MC<sup>2</sup>RAM: Markov Chain Monte Carlo Sampling in SRAM for Fast Bayesian Inference.
CoRR, 2020

Non-parametric Statistical Density Function Synthesizer and Monte Carlo Sampler in CMOS.
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

Fault Attack Detection in AES by Monitoring Power Side-Channel Statistics.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

MC2RAM: Markov Chain Monte Carlo Sampling in SRAM for Fast Bayesian Inference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
An Intrinsic and Database-Free Authentication by Exploiting Process Variation in Back-End Capacitors.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2018
Intrinsic and Database-free Watermarking in ICs by Exploiting Process and Design Dependent Variability in Metal-Oxide-Metal Capacitances.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Ultralow power acoustic feature-scoring using gaussian I-V transistors.
Proceedings of the 55th Annual Design Automation Conference, 2018


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