Ahmed Shebaita

According to our database1, Ahmed Shebaita authored at least 9 papers between 2006 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2013
TAU 2013 variation aware timing analysis contest.
Proceedings of the International Symposium on Physical Design, 2013

2011
FA-STAC: An Algorithmic Framework for Fast and Accurate Coupling Aware Static Timing Analysis.
IEEE Trans. Very Large Scale Integr. Syst., 2011

A Novel Moment Based Framework for Accurate and Efficient Static Timing Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

2008
Multiple Threshold Voltage Design Scheme for CMOS Tapered Buffers.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

2007
Variable Threshold Voltage Design Scheme for CMOS Tapered Buffers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Including inductance in static timing analysis.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

NostraXtalk: a predictive framework for accurate static timing analysis in udsm vlsi circuits.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

2006
FA-STAC: A Framework for Fast and Accurate Static Timing Analysis with Coupling.
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

Importance of volume discretization of single and coupled interconnects.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006


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