Ajit Mathew

According to our database1, Ajit Mathew authored at least 5 papers between 2016 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
TIPS: Making Volatile Index Structures Persistent with DRAM-NVMM Tiering.
Proceedings of the 2021 USENIX Annual Technical Conference, 2021

2020
HydraList: A Scalable In-Memory Index Using Asynchronous Updates and Partial Replication.
Proc. VLDB Endow., 2020

Durable Transactional Memory Can Scale with Timestone.
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020

2019
MV-RLU: Scaling Read-Log-Update with Multi-Versioning.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2016
Re-targeting Optimization Sequences from Scalar Processors to FPGAs in HLS compilers (Abstract Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016


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