Alexander Kloes

According to our database1, Alexander Kloes authored at least 26 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Simulation and Modeling of Silicon Semiconductor Devices and Sensors.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023

Comparison between WKB and Wavelet Approach for Analytical Calculation of Tunneling Currents in Schottky Barrier Field-Effect Transistors.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023

2022
Compact Modeling of Channel-Resistance Effects in Reconfigurable Field-Effect Transistors.
Proceedings of the 29th International Conference on Mixed Design of Integrated Circuits and System, 2022

Impact of Mechanical Bending on the Performance of Organic Thin-Film Transistors and the Characteristic Temperature of the Density of States.
Proceedings of the 29th International Conference on Mixed Design of Integrated Circuits and System, 2022

Analytical Calculation of Inference in Memristor-based Stochastic Artificial Neural Networks.
Proceedings of the 29th International Conference on Mixed Design of Integrated Circuits and System, 2022

2021
Variability-Aware Characterization of Current Mirrors Based on Organic Thin-Film Transistors on Flexible Substrates.
Proceedings of the 2021 28th International Conference on Mixed Design of Integrated Circuits and System, 2021

2019
Analytical Model for Threshold-Voltage Shift in Submicron Staggered Organic Thin-Film Transistors.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

Closed-Form Modeling Approach of Trap-Assisted Tunneling Current for Use in Compact TFET Models.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

Characterization of the Charge-Trap Dynamics in Organic Thin-Film Transistors.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

Evaluation of Static/Transient Performance of TFET Inverter Regarding Device Parameters Using a Compact Model.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Process and Device Simulation of Schottky Barrier MOSFETs for Analysis of Current Injection.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

An Area Equivalent WKB Approach to Calculate the B2B Tunneling Probability for a Numerical Robust Implementation in TFET Compact Models.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

2017
Simulation framework for barrier lowering in Schottky barrier MOSFETs.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

Non-iterative NEGF based model for band-to-band tunneling current in DG TFETs.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

Analytical modeling of RDF effects on the threshold voltage in short-channel double-gate MOSFETs.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

2016
Analysis and 2D analytical modeling of III-V Schottky barrier Double-Gate MOSFETs.
Proceedings of the 2016 MIXDES, 2016

Modeling approach for rapid NEGF-based simulation of ballistic current in ultra-short DG MOSFETs.
Proceedings of the 2016 MIXDES, 2016

Comparative numerical analysis and analytical RDF-modeling of MOSFETs and DG Tunnel-FETs.
Proceedings of the 2016 MIXDES, 2016

Implementation of a DC compact model for double-gate Tunnel-FET based on 2D calculations and application in circuit simulation.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015
Wavelet-based calculation of the transmission coefficient for tunneling events in Tunnel-FETs.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

2014
Modeling and performance study of nanoscale double gate junctionless and inversion mode MOSFETs including carrier quantization effects.
Microelectron. J., 2014

A 2D closed form model for the electrostatics in hetero-junction double-gate tunnel-FETs for calculation of band-to-band tunneling current.
Microelectron. J., 2014

Improved analytical potential modeling in double-gate tunnel-FETs.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

3-D compact model for nanoscale junctionless triple-gate nanowire MOSFETs.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
Unified charge model for short-channel junctionless double gate MOSFETs.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

Two-dimensional physics-based modeling of electrostatics and band-to-band tunneling in tunnel-FETs.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013


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